 bb6d8c8828
			
		
	
	
	bb6d8c8828
	
	
	
		
			
			Patch from Sascha Hauer This patch adds the base support for Hilscher's netX network processors. Signed-off-by: Robert Schwebel <r.schwebel@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
		
			
				
	
	
		
			76 lines
		
	
	
	
		
			1.9 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			76 lines
		
	
	
	
		
			1.9 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * include/asm-arm/arch-netx/uncompress.h
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|  *
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|  * Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
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|  *
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|  * This program is free software; you can redistribute it and/or modify
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|  * it under the terms of the GNU General Public License version 2
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|  * as published by the Free Software Foundation.
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|  *
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|  * This program is distributed in the hope that it will be useful,
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|  * but WITHOUT ANY WARRANTY; without even the implied warranty of
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|  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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|  * GNU General Public License for more details.
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|  *
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|  * You should have received a copy of the GNU General Public License
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|  * along with this program; if not, write to the Free Software
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|  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
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|  */
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| 
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| /*
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|  * The following code assumes the serial port has already been
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|  * initialized by the bootloader.  We search for the first enabled
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|  * port in the most probable order.  If you didn't setup a port in
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|  * your bootloader then nothing will appear (which might be desired).
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|  *
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|  * This does not append a newline
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|  */
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| 
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| #define REG(x) (*(volatile unsigned long *)(x))
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| 
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| #define UART1_BASE 0x100a00
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| #define UART2_BASE 0x100a80
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| 
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| #define UART_DR 0x0
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| 
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| #define UART_CR 0x14
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| #define CR_UART_EN (1<<0)
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| 
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| #define UART_FR 0x18
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| #define FR_BUSY (1<<3)
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| #define FR_TXFF (1<<5)
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| 
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| static void putc(char c)
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| {
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| 	unsigned long base;
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| 
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| 	if (REG(UART1_BASE + UART_CR) & CR_UART_EN)
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| 		base = UART1_BASE;
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| 	else if (REG(UART2_BASE + UART_CR) & CR_UART_EN)
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| 		base = UART2_BASE;
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| 	else
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| 		return;
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| 
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| 	while (REG(base + UART_FR) & FR_TXFF);
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| 	REG(base + UART_DR) = c;
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| }
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| 
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| static inline void flush(void)
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| {
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| 	unsigned long base;
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| 
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| 	if (REG(UART1_BASE + UART_CR) & CR_UART_EN)
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| 		base = UART1_BASE;
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| 	else if (REG(UART2_BASE + UART_CR) & CR_UART_EN)
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| 		base = UART2_BASE;
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| 	else
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| 		return;
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| 
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| 	while (REG(base + UART_FR) & FR_BUSY);
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| }
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| 
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| /*
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|  * nothing to do
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|  */
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| #define arch_decomp_setup()
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| #define arch_decomp_wdog()
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