This is no longer needed since the core now handles this through DBG_G_CHIP_INFO. Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Lad, Prabhakar <prabhakar.csengg@gmail.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
		
			
				
	
	
		
			473 lines
		
	
	
	
		
			11 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			473 lines
		
	
	
	
		
			11 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * adv7393 - ADV7393 Video Encoder Driver
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 *
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 * The encoder hardware does not support SECAM.
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 *
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 * Copyright (C) 2010-2012 ADVANSEE - http://www.advansee.com/
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 * Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
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 *
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 * Based on ADV7343 driver,
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 *
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 * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
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 *
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 * This program is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU General Public License as
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 * published by the Free Software Foundation version 2.
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 *
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 * This program is distributed .as is. WITHOUT ANY WARRANTY of any
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 * kind, whether express or implied; without even the implied warranty
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 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 * GNU General Public License for more details.
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 */
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 | 
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/ctype.h>
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#include <linux/slab.h>
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#include <linux/i2c.h>
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#include <linux/device.h>
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#include <linux/delay.h>
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#include <linux/module.h>
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#include <linux/videodev2.h>
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#include <linux/uaccess.h>
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#include <media/adv7393.h>
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#include <media/v4l2-device.h>
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#include <media/v4l2-ctrls.h>
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#include "adv7393_regs.h"
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MODULE_DESCRIPTION("ADV7393 video encoder driver");
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MODULE_LICENSE("GPL");
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static bool debug;
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module_param(debug, bool, 0644);
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MODULE_PARM_DESC(debug, "Debug level 0-1");
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struct adv7393_state {
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	struct v4l2_subdev sd;
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	struct v4l2_ctrl_handler hdl;
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	u8 reg00;
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	u8 reg01;
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	u8 reg02;
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	u8 reg35;
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	u8 reg80;
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	u8 reg82;
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	u32 output;
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	v4l2_std_id std;
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};
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static inline struct adv7393_state *to_state(struct v4l2_subdev *sd)
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{
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	return container_of(sd, struct adv7393_state, sd);
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}
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static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
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{
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	return &container_of(ctrl->handler, struct adv7393_state, hdl)->sd;
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}
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static inline int adv7393_write(struct v4l2_subdev *sd, u8 reg, u8 value)
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{
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	struct i2c_client *client = v4l2_get_subdevdata(sd);
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	return i2c_smbus_write_byte_data(client, reg, value);
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}
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static const u8 adv7393_init_reg_val[] = {
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	ADV7393_SOFT_RESET, ADV7393_SOFT_RESET_DEFAULT,
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	ADV7393_POWER_MODE_REG, ADV7393_POWER_MODE_REG_DEFAULT,
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	ADV7393_HD_MODE_REG1, ADV7393_HD_MODE_REG1_DEFAULT,
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	ADV7393_HD_MODE_REG2, ADV7393_HD_MODE_REG2_DEFAULT,
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	ADV7393_HD_MODE_REG3, ADV7393_HD_MODE_REG3_DEFAULT,
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	ADV7393_HD_MODE_REG4, ADV7393_HD_MODE_REG4_DEFAULT,
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	ADV7393_HD_MODE_REG5, ADV7393_HD_MODE_REG5_DEFAULT,
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	ADV7393_HD_MODE_REG6, ADV7393_HD_MODE_REG6_DEFAULT,
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	ADV7393_HD_MODE_REG7, ADV7393_HD_MODE_REG7_DEFAULT,
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	ADV7393_SD_MODE_REG1, ADV7393_SD_MODE_REG1_DEFAULT,
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	ADV7393_SD_MODE_REG2, ADV7393_SD_MODE_REG2_DEFAULT,
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	ADV7393_SD_MODE_REG3, ADV7393_SD_MODE_REG3_DEFAULT,
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	ADV7393_SD_MODE_REG4, ADV7393_SD_MODE_REG4_DEFAULT,
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	ADV7393_SD_MODE_REG5, ADV7393_SD_MODE_REG5_DEFAULT,
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	ADV7393_SD_MODE_REG6, ADV7393_SD_MODE_REG6_DEFAULT,
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	ADV7393_SD_MODE_REG7, ADV7393_SD_MODE_REG7_DEFAULT,
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	ADV7393_SD_MODE_REG8, ADV7393_SD_MODE_REG8_DEFAULT,
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	ADV7393_SD_TIMING_REG0, ADV7393_SD_TIMING_REG0_DEFAULT,
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	ADV7393_SD_HUE_ADJUST, ADV7393_SD_HUE_ADJUST_DEFAULT,
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	ADV7393_SD_CGMS_WSS0, ADV7393_SD_CGMS_WSS0_DEFAULT,
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	ADV7393_SD_BRIGHTNESS_WSS, ADV7393_SD_BRIGHTNESS_WSS_DEFAULT,
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};
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/*
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 * 			    2^32
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 * FSC(reg) =  FSC (HZ) * --------
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 *			  27000000
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 */
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static const struct adv7393_std_info stdinfo[] = {
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	{
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		/* FSC(Hz) = 4,433,618.75 Hz */
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		SD_STD_NTSC, 705268427, V4L2_STD_NTSC_443,
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	}, {
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		/* FSC(Hz) = 3,579,545.45 Hz */
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		SD_STD_NTSC, 569408542, V4L2_STD_NTSC,
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	}, {
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		/* FSC(Hz) = 3,575,611.00 Hz */
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		SD_STD_PAL_M, 568782678, V4L2_STD_PAL_M,
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	}, {
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		/* FSC(Hz) = 3,582,056.00 Hz */
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		SD_STD_PAL_N, 569807903, V4L2_STD_PAL_Nc,
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	}, {
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		/* FSC(Hz) = 4,433,618.75 Hz */
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		SD_STD_PAL_N, 705268427, V4L2_STD_PAL_N,
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	}, {
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		/* FSC(Hz) = 4,433,618.75 Hz */
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		SD_STD_PAL_M, 705268427, V4L2_STD_PAL_60,
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	}, {
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		/* FSC(Hz) = 4,433,618.75 Hz */
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		SD_STD_PAL_BDGHI, 705268427, V4L2_STD_PAL,
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	},
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};
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static int adv7393_setstd(struct v4l2_subdev *sd, v4l2_std_id std)
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{
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	struct adv7393_state *state = to_state(sd);
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	const struct adv7393_std_info *std_info;
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	int num_std;
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	u8 reg;
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	u32 val;
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	int err = 0;
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	int i;
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	num_std = ARRAY_SIZE(stdinfo);
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	for (i = 0; i < num_std; i++) {
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		if (stdinfo[i].stdid & std)
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			break;
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	}
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	if (i == num_std) {
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		v4l2_dbg(1, debug, sd,
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				"Invalid std or std is not supported: %llx\n",
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						(unsigned long long)std);
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		return -EINVAL;
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	}
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	std_info = &stdinfo[i];
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	/* Set the standard */
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	val = state->reg80 & ~SD_STD_MASK;
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	val |= std_info->standard_val3;
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	err = adv7393_write(sd, ADV7393_SD_MODE_REG1, val);
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	if (err < 0)
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		goto setstd_exit;
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	state->reg80 = val;
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	/* Configure the input mode register */
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	val = state->reg01 & ~INPUT_MODE_MASK;
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	val |= SD_INPUT_MODE;
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	err = adv7393_write(sd, ADV7393_MODE_SELECT_REG, val);
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	if (err < 0)
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		goto setstd_exit;
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	state->reg01 = val;
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	/* Program the sub carrier frequency registers */
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	val = std_info->fsc_val;
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	for (reg = ADV7393_FSC_REG0; reg <= ADV7393_FSC_REG3; reg++) {
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		err = adv7393_write(sd, reg, val);
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		if (err < 0)
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			goto setstd_exit;
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		val >>= 8;
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	}
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	val = state->reg82;
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	/* Pedestal settings */
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	if (std & (V4L2_STD_NTSC | V4L2_STD_NTSC_443))
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		val |= SD_PEDESTAL_EN;
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	else
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		val &= SD_PEDESTAL_DI;
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	err = adv7393_write(sd, ADV7393_SD_MODE_REG2, val);
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	if (err < 0)
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		goto setstd_exit;
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	state->reg82 = val;
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setstd_exit:
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	if (err != 0)
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		v4l2_err(sd, "Error setting std, write failed\n");
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	return err;
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}
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static int adv7393_setoutput(struct v4l2_subdev *sd, u32 output_type)
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{
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	struct adv7393_state *state = to_state(sd);
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	u8 val;
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	int err = 0;
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	if (output_type > ADV7393_SVIDEO_ID) {
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		v4l2_dbg(1, debug, sd,
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			"Invalid output type or output type not supported:%d\n",
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								output_type);
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		return -EINVAL;
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	}
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	/* Enable Appropriate DAC */
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	val = state->reg00 & 0x03;
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	if (output_type == ADV7393_COMPOSITE_ID)
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		val |= ADV7393_COMPOSITE_POWER_VALUE;
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	else if (output_type == ADV7393_COMPONENT_ID)
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		val |= ADV7393_COMPONENT_POWER_VALUE;
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	else
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		val |= ADV7393_SVIDEO_POWER_VALUE;
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	err = adv7393_write(sd, ADV7393_POWER_MODE_REG, val);
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	if (err < 0)
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		goto setoutput_exit;
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	state->reg00 = val;
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	/* Enable YUV output */
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	val = state->reg02 | YUV_OUTPUT_SELECT;
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	err = adv7393_write(sd, ADV7393_MODE_REG0, val);
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	if (err < 0)
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		goto setoutput_exit;
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	state->reg02 = val;
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	/* configure SD DAC Output 1 bit */
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	val = state->reg82;
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	if (output_type == ADV7393_COMPONENT_ID)
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		val &= SD_DAC_OUT1_DI;
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	else
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		val |= SD_DAC_OUT1_EN;
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	err = adv7393_write(sd, ADV7393_SD_MODE_REG2, val);
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	if (err < 0)
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		goto setoutput_exit;
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	state->reg82 = val;
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 | 
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	/* configure ED/HD Color DAC Swap bit to zero */
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	val = state->reg35 & HD_DAC_SWAP_DI;
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	err = adv7393_write(sd, ADV7393_HD_MODE_REG6, val);
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	if (err < 0)
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		goto setoutput_exit;
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	state->reg35 = val;
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 | 
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setoutput_exit:
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	if (err != 0)
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		v4l2_err(sd, "Error setting output, write failed\n");
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	return err;
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}
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 | 
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static int adv7393_log_status(struct v4l2_subdev *sd)
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{
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	struct adv7393_state *state = to_state(sd);
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 | 
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	v4l2_info(sd, "Standard: %llx\n", (unsigned long long)state->std);
 | 
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	v4l2_info(sd, "Output: %s\n", (state->output == 0) ? "Composite" :
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			((state->output == 1) ? "Component" : "S-Video"));
 | 
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	return 0;
 | 
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}
 | 
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 | 
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static int adv7393_s_ctrl(struct v4l2_ctrl *ctrl)
 | 
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{
 | 
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	struct v4l2_subdev *sd = to_sd(ctrl);
 | 
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 | 
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	switch (ctrl->id) {
 | 
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	case V4L2_CID_BRIGHTNESS:
 | 
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		return adv7393_write(sd, ADV7393_SD_BRIGHTNESS_WSS,
 | 
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					ctrl->val & SD_BRIGHTNESS_VALUE_MASK);
 | 
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 | 
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	case V4L2_CID_HUE:
 | 
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		return adv7393_write(sd, ADV7393_SD_HUE_ADJUST,
 | 
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					ctrl->val - ADV7393_HUE_MIN);
 | 
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 | 
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	case V4L2_CID_GAIN:
 | 
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		return adv7393_write(sd, ADV7393_DAC123_OUTPUT_LEVEL,
 | 
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					ctrl->val);
 | 
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	}
 | 
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	return -EINVAL;
 | 
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}
 | 
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 | 
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static const struct v4l2_ctrl_ops adv7393_ctrl_ops = {
 | 
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	.s_ctrl = adv7393_s_ctrl,
 | 
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};
 | 
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 | 
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static const struct v4l2_subdev_core_ops adv7393_core_ops = {
 | 
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	.log_status = adv7393_log_status,
 | 
						|
	.g_ext_ctrls = v4l2_subdev_g_ext_ctrls,
 | 
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	.try_ext_ctrls = v4l2_subdev_try_ext_ctrls,
 | 
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	.s_ext_ctrls = v4l2_subdev_s_ext_ctrls,
 | 
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	.g_ctrl = v4l2_subdev_g_ctrl,
 | 
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	.s_ctrl = v4l2_subdev_s_ctrl,
 | 
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	.queryctrl = v4l2_subdev_queryctrl,
 | 
						|
	.querymenu = v4l2_subdev_querymenu,
 | 
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};
 | 
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 | 
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static int adv7393_s_std_output(struct v4l2_subdev *sd, v4l2_std_id std)
 | 
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{
 | 
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	struct adv7393_state *state = to_state(sd);
 | 
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	int err = 0;
 | 
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 | 
						|
	if (state->std == std)
 | 
						|
		return 0;
 | 
						|
 | 
						|
	err = adv7393_setstd(sd, std);
 | 
						|
	if (!err)
 | 
						|
		state->std = std;
 | 
						|
 | 
						|
	return err;
 | 
						|
}
 | 
						|
 | 
						|
static int adv7393_s_routing(struct v4l2_subdev *sd,
 | 
						|
		u32 input, u32 output, u32 config)
 | 
						|
{
 | 
						|
	struct adv7393_state *state = to_state(sd);
 | 
						|
	int err = 0;
 | 
						|
 | 
						|
	if (state->output == output)
 | 
						|
		return 0;
 | 
						|
 | 
						|
	err = adv7393_setoutput(sd, output);
 | 
						|
	if (!err)
 | 
						|
		state->output = output;
 | 
						|
 | 
						|
	return err;
 | 
						|
}
 | 
						|
 | 
						|
static const struct v4l2_subdev_video_ops adv7393_video_ops = {
 | 
						|
	.s_std_output	= adv7393_s_std_output,
 | 
						|
	.s_routing	= adv7393_s_routing,
 | 
						|
};
 | 
						|
 | 
						|
static const struct v4l2_subdev_ops adv7393_ops = {
 | 
						|
	.core	= &adv7393_core_ops,
 | 
						|
	.video	= &adv7393_video_ops,
 | 
						|
};
 | 
						|
 | 
						|
static int adv7393_initialize(struct v4l2_subdev *sd)
 | 
						|
{
 | 
						|
	struct adv7393_state *state = to_state(sd);
 | 
						|
	int err = 0;
 | 
						|
	int i;
 | 
						|
 | 
						|
	for (i = 0; i < ARRAY_SIZE(adv7393_init_reg_val); i += 2) {
 | 
						|
 | 
						|
		err = adv7393_write(sd, adv7393_init_reg_val[i],
 | 
						|
					adv7393_init_reg_val[i+1]);
 | 
						|
		if (err) {
 | 
						|
			v4l2_err(sd, "Error initializing\n");
 | 
						|
			return err;
 | 
						|
		}
 | 
						|
	}
 | 
						|
 | 
						|
	/* Configure for default video standard */
 | 
						|
	err = adv7393_setoutput(sd, state->output);
 | 
						|
	if (err < 0) {
 | 
						|
		v4l2_err(sd, "Error setting output during init\n");
 | 
						|
		return -EINVAL;
 | 
						|
	}
 | 
						|
 | 
						|
	err = adv7393_setstd(sd, state->std);
 | 
						|
	if (err < 0) {
 | 
						|
		v4l2_err(sd, "Error setting std during init\n");
 | 
						|
		return -EINVAL;
 | 
						|
	}
 | 
						|
 | 
						|
	return err;
 | 
						|
}
 | 
						|
 | 
						|
static int adv7393_probe(struct i2c_client *client,
 | 
						|
				const struct i2c_device_id *id)
 | 
						|
{
 | 
						|
	struct adv7393_state *state;
 | 
						|
	int err;
 | 
						|
 | 
						|
	if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
 | 
						|
		return -ENODEV;
 | 
						|
 | 
						|
	v4l_info(client, "chip found @ 0x%x (%s)\n",
 | 
						|
			client->addr << 1, client->adapter->name);
 | 
						|
 | 
						|
	state = devm_kzalloc(&client->dev, sizeof(*state), GFP_KERNEL);
 | 
						|
	if (state == NULL)
 | 
						|
		return -ENOMEM;
 | 
						|
 | 
						|
	state->reg00	= ADV7393_POWER_MODE_REG_DEFAULT;
 | 
						|
	state->reg01	= 0x00;
 | 
						|
	state->reg02	= 0x20;
 | 
						|
	state->reg35	= ADV7393_HD_MODE_REG6_DEFAULT;
 | 
						|
	state->reg80	= ADV7393_SD_MODE_REG1_DEFAULT;
 | 
						|
	state->reg82	= ADV7393_SD_MODE_REG2_DEFAULT;
 | 
						|
 | 
						|
	state->output = ADV7393_COMPOSITE_ID;
 | 
						|
	state->std = V4L2_STD_NTSC;
 | 
						|
 | 
						|
	v4l2_i2c_subdev_init(&state->sd, client, &adv7393_ops);
 | 
						|
 | 
						|
	v4l2_ctrl_handler_init(&state->hdl, 3);
 | 
						|
	v4l2_ctrl_new_std(&state->hdl, &adv7393_ctrl_ops,
 | 
						|
			V4L2_CID_BRIGHTNESS, ADV7393_BRIGHTNESS_MIN,
 | 
						|
					     ADV7393_BRIGHTNESS_MAX, 1,
 | 
						|
					     ADV7393_BRIGHTNESS_DEF);
 | 
						|
	v4l2_ctrl_new_std(&state->hdl, &adv7393_ctrl_ops,
 | 
						|
			V4L2_CID_HUE, ADV7393_HUE_MIN,
 | 
						|
				      ADV7393_HUE_MAX, 1,
 | 
						|
				      ADV7393_HUE_DEF);
 | 
						|
	v4l2_ctrl_new_std(&state->hdl, &adv7393_ctrl_ops,
 | 
						|
			V4L2_CID_GAIN, ADV7393_GAIN_MIN,
 | 
						|
				       ADV7393_GAIN_MAX, 1,
 | 
						|
				       ADV7393_GAIN_DEF);
 | 
						|
	state->sd.ctrl_handler = &state->hdl;
 | 
						|
	if (state->hdl.error) {
 | 
						|
		int err = state->hdl.error;
 | 
						|
 | 
						|
		v4l2_ctrl_handler_free(&state->hdl);
 | 
						|
		return err;
 | 
						|
	}
 | 
						|
	v4l2_ctrl_handler_setup(&state->hdl);
 | 
						|
 | 
						|
	err = adv7393_initialize(&state->sd);
 | 
						|
	if (err)
 | 
						|
		v4l2_ctrl_handler_free(&state->hdl);
 | 
						|
	return err;
 | 
						|
}
 | 
						|
 | 
						|
static int adv7393_remove(struct i2c_client *client)
 | 
						|
{
 | 
						|
	struct v4l2_subdev *sd = i2c_get_clientdata(client);
 | 
						|
	struct adv7393_state *state = to_state(sd);
 | 
						|
 | 
						|
	v4l2_device_unregister_subdev(sd);
 | 
						|
	v4l2_ctrl_handler_free(&state->hdl);
 | 
						|
 | 
						|
	return 0;
 | 
						|
}
 | 
						|
 | 
						|
static const struct i2c_device_id adv7393_id[] = {
 | 
						|
	{"adv7393", 0},
 | 
						|
	{},
 | 
						|
};
 | 
						|
MODULE_DEVICE_TABLE(i2c, adv7393_id);
 | 
						|
 | 
						|
static struct i2c_driver adv7393_driver = {
 | 
						|
	.driver = {
 | 
						|
		.owner	= THIS_MODULE,
 | 
						|
		.name	= "adv7393",
 | 
						|
	},
 | 
						|
	.probe		= adv7393_probe,
 | 
						|
	.remove		= adv7393_remove,
 | 
						|
	.id_table	= adv7393_id,
 | 
						|
};
 | 
						|
module_i2c_driver(adv7393_driver);
 |