965ea4bbb9
Implement global TLB flushing for MN10300. This will be used by the AM34 which is SMP capable. Signed-off-by: Akira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: Kiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: David Howells <dhowells@redhat.com>
154 lines
3.4 KiB
C
154 lines
3.4 KiB
C
/* MN10300 TLB flushing functions
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*
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* Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
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* Written by David Howells (dhowells@redhat.com)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public Licence
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* as published by the Free Software Foundation; either version
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* 2 of the Licence, or (at your option) any later version.
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*/
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#ifndef _ASM_TLBFLUSH_H
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#define _ASM_TLBFLUSH_H
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#include <linux/mm.h>
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#include <asm/processor.h>
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struct tlb_state {
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struct mm_struct *active_mm;
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int state;
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};
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DECLARE_PER_CPU_SHARED_ALIGNED(struct tlb_state, cpu_tlbstate);
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/**
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* local_flush_tlb - Flush the current MM's entries from the local CPU's TLBs
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*/
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static inline void local_flush_tlb(void)
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{
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int w;
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asm volatile(
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" mov %1,%0 \n"
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" or %2,%0 \n"
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" mov %0,%1 \n"
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: "=d"(w)
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: "m"(MMUCTR), "i"(MMUCTR_IIV|MMUCTR_DIV)
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: "cc", "memory");
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}
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/**
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* local_flush_tlb_all - Flush all entries from the local CPU's TLBs
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*/
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static inline void local_flush_tlb_all(void)
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{
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local_flush_tlb();
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}
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/**
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* local_flush_tlb_one - Flush one entry from the local CPU's TLBs
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*/
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static inline void local_flush_tlb_one(unsigned long addr)
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{
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local_flush_tlb();
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}
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/**
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* local_flush_tlb_page - Flush a page's entry from the local CPU's TLBs
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* @mm: The MM to flush for
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* @addr: The address of the target page in RAM (not its page struct)
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*/
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static inline
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void local_flush_tlb_page(struct mm_struct *mm, unsigned long addr)
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{
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unsigned long pteu, flags, cnx;
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addr &= PAGE_MASK;
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local_irq_save(flags);
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cnx = 1;
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#ifdef CONFIG_MN10300_TLB_USE_PIDR
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cnx = mm->context.tlbpid[smp_processor_id()];
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#endif
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if (cnx) {
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pteu = addr;
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#ifdef CONFIG_MN10300_TLB_USE_PIDR
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pteu |= cnx & xPTEU_PID;
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#endif
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IPTEU = pteu;
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DPTEU = pteu;
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if (IPTEL & xPTEL_V)
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IPTEL = 0;
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if (DPTEL & xPTEL_V)
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DPTEL = 0;
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}
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local_irq_restore(flags);
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}
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/*
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* TLB flushing:
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*
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* - flush_tlb() flushes the current mm struct TLBs
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* - flush_tlb_all() flushes all processes TLBs
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* - flush_tlb_mm(mm) flushes the specified mm context TLB's
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* - flush_tlb_page(vma, vmaddr) flushes one page
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* - flush_tlb_range(mm, start, end) flushes a range of pages
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* - flush_tlb_pgtables(mm, start, end) flushes a range of page tables
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*/
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#ifdef CONFIG_SMP
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#include <asm/smp.h>
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extern void flush_tlb_all(void);
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extern void flush_tlb_current_task(void);
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extern void flush_tlb_mm(struct mm_struct *);
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extern void flush_tlb_page(struct vm_area_struct *, unsigned long);
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#define flush_tlb() flush_tlb_current_task()
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static inline void flush_tlb_range(struct vm_area_struct *vma,
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unsigned long start, unsigned long end)
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{
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flush_tlb_mm(vma->vm_mm);
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}
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#else /* CONFIG_SMP */
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static inline void flush_tlb_all(void)
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{
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preempt_disable();
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local_flush_tlb_all();
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preempt_enable();
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}
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static inline void flush_tlb_mm(struct mm_struct *mm)
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{
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preempt_disable();
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local_flush_tlb_all();
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preempt_enable();
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}
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static inline void flush_tlb_range(struct vm_area_struct *vma,
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unsigned long start, unsigned long end)
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{
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preempt_disable();
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local_flush_tlb_all();
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preempt_enable();
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}
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#define flush_tlb_page(vma, addr) local_flush_tlb_page((vma)->vm_mm, addr)
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#define flush_tlb() flush_tlb_all()
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#endif /* CONFIG_SMP */
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static inline void flush_tlb_kernel_range(unsigned long start,
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unsigned long end)
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{
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flush_tlb_all();
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}
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static inline void flush_tlb_pgtables(struct mm_struct *mm,
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unsigned long start, unsigned long end)
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{
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}
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#endif /* _ASM_TLBFLUSH_H */
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