f7a904dffe
Currently wuzj@lemote.com is not usable; change it to wuzhangjin@gmail.com. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: yanh@lemote.com Cc: huhb@lemote.com Cc: zhangfx@lemote.com Patchwork: http://patchwork.linux-mips.org/patch/829/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
159 lines
3.5 KiB
C
159 lines
3.5 KiB
C
/* Board-specific reboot/shutdown routines
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*
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* Copyright (c) 2009 Philippe Vachon <philippe@cowpig.ca>
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*
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* Copyright (C) 2009 Lemote Inc.
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* Author: Wu Zhangjin, wuzhangjin@gmail.com
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/io.h>
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#include <linux/delay.h>
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#include <linux/types.h>
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#include <asm/bootinfo.h>
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#include <loongson.h>
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#include <cs5536/cs5536.h>
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#include "ec_kb3310b.h"
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static void reset_cpu(void)
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{
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/*
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* reset cpu to full speed, this is needed when enabling cpu frequency
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* scalling
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*/
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LOONGSON_CHIPCFG0 |= 0x7;
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}
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/* reset support for fuloong2f */
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static void fl2f_reboot(void)
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{
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reset_cpu();
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/* send a reset signal to south bridge.
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*
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* NOTE: if enable "Power Management" in kernel, rtl8169 will not reset
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* normally with this reset operation and it will not work in PMON, but
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* you can type halt command and then reboot, seems the hardware reset
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* logic not work normally.
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*/
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{
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u32 hi, lo;
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_rdmsr(DIVIL_MSR_REG(DIVIL_SOFT_RESET), &hi, &lo);
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lo |= 0x00000001;
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_wrmsr(DIVIL_MSR_REG(DIVIL_SOFT_RESET), hi, lo);
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}
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}
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static void fl2f_shutdown(void)
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{
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u32 hi, lo, val;
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int gpio_base;
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/* get gpio base */
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_rdmsr(DIVIL_MSR_REG(DIVIL_LBAR_GPIO), &hi, &lo);
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gpio_base = lo & 0xff00;
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/* make cs5536 gpio13 output enable */
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val = inl(gpio_base + GPIOL_OUT_EN);
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val &= ~(1 << (16 + 13));
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val |= (1 << 13);
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outl(val, gpio_base + GPIOL_OUT_EN);
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mmiowb();
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/* make cs5536 gpio13 output low level voltage. */
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val = inl(gpio_base + GPIOL_OUT_VAL) & ~(1 << (13));
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val |= (1 << (16 + 13));
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outl(val, gpio_base + GPIOL_OUT_VAL);
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mmiowb();
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}
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/* reset support for yeeloong2f and mengloong2f notebook */
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void ml2f_reboot(void)
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{
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reset_cpu();
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/* sending an reset signal to EC(embedded controller) */
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ec_write(REG_RESET, BIT_RESET_ON);
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}
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#define yl2f89_reboot ml2f_reboot
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/* menglong(7inches) laptop has different shutdown logic from 8.9inches */
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#define EC_SHUTDOWN_IO_PORT_HIGH 0xff2d
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#define EC_SHUTDOWN_IO_PORT_LOW 0xff2e
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#define EC_SHUTDOWN_IO_PORT_DATA 0xff2f
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#define REG_SHUTDOWN_HIGH 0xFC
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#define REG_SHUTDOWN_LOW 0x29
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#define BIT_SHUTDOWN_ON (1 << 1)
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static void ml2f_shutdown(void)
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{
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u8 val;
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u64 i;
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outb(REG_SHUTDOWN_HIGH, EC_SHUTDOWN_IO_PORT_HIGH);
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outb(REG_SHUTDOWN_LOW, EC_SHUTDOWN_IO_PORT_LOW);
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mmiowb();
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val = inb(EC_SHUTDOWN_IO_PORT_DATA);
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outb(val & (~BIT_SHUTDOWN_ON), EC_SHUTDOWN_IO_PORT_DATA);
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mmiowb();
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/* need enough wait here... how many microseconds needs? */
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for (i = 0; i < 0x10000; i++)
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delay();
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outb(val | BIT_SHUTDOWN_ON, EC_SHUTDOWN_IO_PORT_DATA);
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mmiowb();
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}
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static void yl2f89_shutdown(void)
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{
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/* cpu-gpio0 output low */
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LOONGSON_GPIODATA &= ~0x00000001;
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/* cpu-gpio0 as output */
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LOONGSON_GPIOIE &= ~0x00000001;
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}
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void mach_prepare_reboot(void)
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{
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switch (mips_machtype) {
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case MACH_LEMOTE_FL2F:
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case MACH_LEMOTE_NAS:
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case MACH_LEMOTE_LL2F:
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fl2f_reboot();
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break;
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case MACH_LEMOTE_ML2F7:
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ml2f_reboot();
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break;
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case MACH_LEMOTE_YL2F89:
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yl2f89_reboot();
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break;
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default:
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break;
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}
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}
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void mach_prepare_shutdown(void)
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{
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switch (mips_machtype) {
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case MACH_LEMOTE_FL2F:
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case MACH_LEMOTE_NAS:
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case MACH_LEMOTE_LL2F:
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fl2f_shutdown();
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break;
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case MACH_LEMOTE_ML2F7:
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ml2f_shutdown();
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break;
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case MACH_LEMOTE_YL2F89:
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yl2f89_shutdown();
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break;
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default:
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break;
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}
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}
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