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Merge tag 'kvm-3.6-1' of git://git.kernel.org/pub/scm/virt/kvm/kvm
Pull KVM updates from Avi Kivity:
"Highlights include
- full big real mode emulation on pre-Westmere Intel hosts (can be
disabled with emulate_invalid_guest_state=0)
- relatively small ppc and s390 updates
- PCID/INVPCID support in guests
- EOI avoidance; 3.6 guests should perform better on 3.6 hosts on
interrupt intensive workloads)
- Lockless write faults during live migration
- EPT accessed/dirty bits support for new Intel processors"
Fix up conflicts in:
- Documentation/virtual/kvm/api.txt:
Stupid subchapter numbering, added next to each other.
- arch/powerpc/kvm/booke_interrupts.S:
PPC asm changes clashing with the KVM fixes
- arch/s390/include/asm/sigp.h, arch/s390/kvm/sigp.c:
Duplicated commits through the kvm tree and the s390 tree, with
subsequent edits in the KVM tree.
* tag 'kvm-3.6-1' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (93 commits)
KVM: fix race with level interrupts
x86, hyper: fix build with !CONFIG_KVM_GUEST
Revert "apic: fix kvm build on UP without IOAPIC"
KVM guest: switch to apic_set_eoi_write, apic_write
apic: add apic_set_eoi_write for PV use
KVM: VMX: Implement PCID/INVPCID for guests with EPT
KVM: Add x86_hyper_kvm to complete detect_hypervisor_platform check
KVM: PPC: Critical interrupt emulation support
KVM: PPC: e500mc: Fix tlbilx emulation for 64-bit guests
KVM: PPC64: booke: Set interrupt computation mode for 64-bit host
KVM: PPC: bookehv: Add ESR flag to Data Storage Interrupt
KVM: PPC: bookehv64: Add support for std/ld emulation.
booke: Added crit/mc exception handler for e500v2
booke/bookehv: Add host crit-watchdog exception support
KVM: MMU: document mmu-lock and fast page fault
KVM: MMU: fix kvm_mmu_pagetable_walk tracepoint
KVM: MMU: trace fast page fault
KVM: MMU: fast path of handling guest page fault
KVM: MMU: introduce SPTE_MMU_WRITEABLE bit
KVM: MMU: fold tlb flush judgement into mmu_spte_update
...
211 lines
4.5 KiB
C
211 lines
4.5 KiB
C
/*
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* Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu>
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*/
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#ifndef _ASM_POWERPC_HW_IRQ_H
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#define _ASM_POWERPC_HW_IRQ_H
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#ifdef __KERNEL__
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#include <linux/errno.h>
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#include <linux/compiler.h>
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#include <asm/ptrace.h>
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#include <asm/processor.h>
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#ifdef CONFIG_PPC64
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/*
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* PACA flags in paca->irq_happened.
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*
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* This bits are set when interrupts occur while soft-disabled
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* and allow a proper replay. Additionally, PACA_IRQ_HARD_DIS
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* is set whenever we manually hard disable.
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*/
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#define PACA_IRQ_HARD_DIS 0x01
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#define PACA_IRQ_DBELL 0x02
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#define PACA_IRQ_EE 0x04
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#define PACA_IRQ_DEC 0x08 /* Or FIT */
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#define PACA_IRQ_EE_EDGE 0x10 /* BookE only */
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#endif /* CONFIG_PPC64 */
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#ifndef __ASSEMBLY__
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extern void __replay_interrupt(unsigned int vector);
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extern void timer_interrupt(struct pt_regs *);
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extern void performance_monitor_exception(struct pt_regs *regs);
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extern void WatchdogException(struct pt_regs *regs);
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extern void unknown_exception(struct pt_regs *regs);
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#ifdef CONFIG_PPC64
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#include <asm/paca.h>
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static inline unsigned long arch_local_save_flags(void)
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{
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unsigned long flags;
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asm volatile(
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"lbz %0,%1(13)"
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: "=r" (flags)
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: "i" (offsetof(struct paca_struct, soft_enabled)));
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return flags;
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}
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static inline unsigned long arch_local_irq_disable(void)
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{
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unsigned long flags, zero;
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asm volatile(
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"li %1,0; lbz %0,%2(13); stb %1,%2(13)"
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: "=r" (flags), "=&r" (zero)
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: "i" (offsetof(struct paca_struct, soft_enabled))
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: "memory");
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return flags;
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}
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extern void arch_local_irq_restore(unsigned long);
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static inline void arch_local_irq_enable(void)
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{
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arch_local_irq_restore(1);
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}
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static inline unsigned long arch_local_irq_save(void)
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{
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return arch_local_irq_disable();
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}
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static inline bool arch_irqs_disabled_flags(unsigned long flags)
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{
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return flags == 0;
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}
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static inline bool arch_irqs_disabled(void)
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{
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return arch_irqs_disabled_flags(arch_local_save_flags());
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}
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#ifdef CONFIG_PPC_BOOK3E
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#define __hard_irq_enable() asm volatile("wrteei 1" : : : "memory")
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#define __hard_irq_disable() asm volatile("wrteei 0" : : : "memory")
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#else
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#define __hard_irq_enable() __mtmsrd(local_paca->kernel_msr | MSR_EE, 1)
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#define __hard_irq_disable() __mtmsrd(local_paca->kernel_msr, 1)
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#endif
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static inline void hard_irq_disable(void)
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{
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__hard_irq_disable();
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get_paca()->soft_enabled = 0;
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get_paca()->irq_happened |= PACA_IRQ_HARD_DIS;
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}
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/* include/linux/interrupt.h needs hard_irq_disable to be a macro */
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#define hard_irq_disable hard_irq_disable
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static inline bool lazy_irq_pending(void)
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{
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return !!(get_paca()->irq_happened & ~PACA_IRQ_HARD_DIS);
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}
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/*
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* This is called by asynchronous interrupts to conditionally
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* re-enable hard interrupts when soft-disabled after having
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* cleared the source of the interrupt
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*/
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static inline void may_hard_irq_enable(void)
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{
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get_paca()->irq_happened &= ~PACA_IRQ_HARD_DIS;
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if (!(get_paca()->irq_happened & PACA_IRQ_EE))
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__hard_irq_enable();
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}
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static inline bool arch_irq_disabled_regs(struct pt_regs *regs)
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{
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return !regs->softe;
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}
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extern bool prep_irq_for_idle(void);
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#else /* CONFIG_PPC64 */
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#define SET_MSR_EE(x) mtmsr(x)
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static inline unsigned long arch_local_save_flags(void)
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{
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return mfmsr();
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}
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static inline void arch_local_irq_restore(unsigned long flags)
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{
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#if defined(CONFIG_BOOKE)
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asm volatile("wrtee %0" : : "r" (flags) : "memory");
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#else
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mtmsr(flags);
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#endif
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}
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static inline unsigned long arch_local_irq_save(void)
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{
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unsigned long flags = arch_local_save_flags();
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#ifdef CONFIG_BOOKE
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asm volatile("wrteei 0" : : : "memory");
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#else
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SET_MSR_EE(flags & ~MSR_EE);
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#endif
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return flags;
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}
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static inline void arch_local_irq_disable(void)
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{
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#ifdef CONFIG_BOOKE
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asm volatile("wrteei 0" : : : "memory");
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#else
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arch_local_irq_save();
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#endif
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}
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static inline void arch_local_irq_enable(void)
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{
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#ifdef CONFIG_BOOKE
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asm volatile("wrteei 1" : : : "memory");
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#else
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unsigned long msr = mfmsr();
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SET_MSR_EE(msr | MSR_EE);
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#endif
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}
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static inline bool arch_irqs_disabled_flags(unsigned long flags)
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{
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return (flags & MSR_EE) == 0;
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}
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static inline bool arch_irqs_disabled(void)
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{
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return arch_irqs_disabled_flags(arch_local_save_flags());
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}
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#define hard_irq_disable() arch_local_irq_disable()
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static inline bool arch_irq_disabled_regs(struct pt_regs *regs)
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{
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return !(regs->msr & MSR_EE);
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}
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static inline void may_hard_irq_enable(void) { }
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#endif /* CONFIG_PPC64 */
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#define ARCH_IRQ_INIT_FLAGS IRQ_NOREQUEST
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/*
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* interrupt-retrigger: should we handle this via lost interrupts and IPIs
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* or should we not care like we do now ? --BenH.
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*/
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struct irq_chip;
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#endif /* __ASSEMBLY__ */
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#endif /* __KERNEL__ */
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#endif /* _ASM_POWERPC_HW_IRQ_H */
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