d6dd735f4b
Because the CPU1 start address is different for socfpga-vt and socfpga-cyclone5, we add code to use the correct CPU1 start addr. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Signed-off-by: Pavel Machek <pavel@denx.de> Cc: Russell King <linux@arm.linux.org.uk> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Olof Johansson <olof@lixom.net> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Olof Johansson <olof@lixom.net>
33 lines
863 B
ArmAsm
33 lines
863 B
ArmAsm
/*
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* Copyright (c) 2003 ARM Limited
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* Copyright (c) u-boot contributors
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* Copyright (c) 2012 Pavel Machek <pavel@denx.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/linkage.h>
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#include <linux/init.h>
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__CPUINIT
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.arch armv7-a
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ENTRY(secondary_trampoline)
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movw r2, #:lower16:cpu1start_addr
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movt r2, #:upper16:cpu1start_addr
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/* The socfpga VT cannot handle a 0xC0000000 page offset when loading
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the cpu1start_addr, we bit clear it. Tested on HW and VT. */
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bic r2, r2, #0x40000000
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ldr r0, [r2]
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ldr r1, [r0]
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bx r1
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ENTRY(secondary_trampoline_end)
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ENTRY(socfpga_secondary_startup)
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bl v7_invalidate_l1
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b secondary_startup
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ENDPROC(socfpga_secondary_startup)
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