 1ef21f6343
			
		
	
	
	1ef21f6343
	
	
	
		
			
			Platform data for device drivers should be defined in include/linux/platform_data/*.h, not in the architecture and platform specific directories. This moves such data out of the msm include directories Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Nicolas Pitre <nico@linaro.org> Acked-by: David Brown <davidb@codeaurora.org> Cc: Daniel Walker <dwalker@fifo99.com> Cc: Bryan Huntsman <bryanh@codeaurora.org> Cc: Chris Ball <cjb@laptop.org> Cc: Florian Tobias Schandinat <FlorianSchandinat@gmx.de> Cc: linux-arm-msm@vger.kernel.org
		
			
				
	
	
		
			441 lines
		
	
	
	
		
			9.7 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			441 lines
		
	
	
	
		
			9.7 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
| /* linux/arch/arm/mach-msm/devices.c
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|  *
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|  * Copyright (C) 2008 Google, Inc.
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|  *
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|  * This software is licensed under the terms of the GNU General Public
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|  * License version 2, as published by the Free Software Foundation, and
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|  * may be copied, distributed, and modified under those terms.
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|  *
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|  * This program is distributed in the hope that it will be useful,
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|  * but WITHOUT ANY WARRANTY; without even the implied warranty of
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|  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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|  * GNU General Public License for more details.
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|  *
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|  */
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| 
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| #include <linux/kernel.h>
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| #include <linux/platform_device.h>
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| #include <linux/clkdev.h>
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| 
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| #include <mach/irqs.h>
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| #include <mach/msm_iomap.h>
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| #include "devices.h"
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| 
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| #include <asm/mach/flash.h>
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| #include <linux/mtd/nand.h>
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| #include <linux/mtd/partitions.h>
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| 
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| #include "clock.h"
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| #include "clock-pcom.h"
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| #include <linux/platform_data/mmc-msm_sdcc.h>
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| 
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| static struct resource resources_uart1[] = {
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| 	{
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| 		.start	= INT_UART1,
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| 		.end	= INT_UART1,
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| 		.flags	= IORESOURCE_IRQ,
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| 	},
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| 	{
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| 		.start	= MSM_UART1_PHYS,
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| 		.end	= MSM_UART1_PHYS + MSM_UART1_SIZE - 1,
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| 		.flags	= IORESOURCE_MEM,
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| 		.name  = "uart_resource"
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| 	},
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| };
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| 
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| static struct resource resources_uart2[] = {
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| 	{
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| 		.start	= INT_UART2,
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| 		.end	= INT_UART2,
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| 		.flags	= IORESOURCE_IRQ,
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| 	},
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| 	{
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| 		.start	= MSM_UART2_PHYS,
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| 		.end	= MSM_UART2_PHYS + MSM_UART2_SIZE - 1,
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| 		.flags	= IORESOURCE_MEM,
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| 		.name  = "uart_resource"
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| 	},
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| };
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| 
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| static struct resource resources_uart3[] = {
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| 	{
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| 		.start	= INT_UART3,
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| 		.end	= INT_UART3,
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| 		.flags	= IORESOURCE_IRQ,
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| 	},
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| 	{
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| 		.start	= MSM_UART3_PHYS,
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| 		.end	= MSM_UART3_PHYS + MSM_UART3_SIZE - 1,
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| 		.flags	= IORESOURCE_MEM,
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| 		.name  = "uart_resource"
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| 	},
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| };
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| 
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| struct platform_device msm_device_uart1 = {
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| 	.name	= "msm_serial",
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| 	.id	= 0,
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| 	.num_resources	= ARRAY_SIZE(resources_uart1),
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| 	.resource	= resources_uart1,
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| };
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| 
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| struct platform_device msm_device_uart2 = {
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| 	.name	= "msm_serial",
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| 	.id	= 1,
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| 	.num_resources	= ARRAY_SIZE(resources_uart2),
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| 	.resource	= resources_uart2,
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| };
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| 
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| struct platform_device msm_device_uart3 = {
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| 	.name	= "msm_serial",
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| 	.id	= 2,
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| 	.num_resources	= ARRAY_SIZE(resources_uart3),
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| 	.resource	= resources_uart3,
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| };
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| 
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| static struct resource resources_i2c[] = {
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| 	{
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| 		.start	= MSM_I2C_PHYS,
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| 		.end	= MSM_I2C_PHYS + MSM_I2C_SIZE - 1,
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| 		.flags	= IORESOURCE_MEM,
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| 	},
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| 	{
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| 		.start	= INT_PWB_I2C,
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| 		.end	= INT_PWB_I2C,
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| 		.flags	= IORESOURCE_IRQ,
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| 	},
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| };
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| 
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| struct platform_device msm_device_i2c = {
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| 	.name		= "msm_i2c",
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| 	.id		= 0,
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| 	.num_resources	= ARRAY_SIZE(resources_i2c),
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| 	.resource	= resources_i2c,
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| };
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| 
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| static struct resource resources_hsusb[] = {
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| 	{
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| 		.start	= MSM_HSUSB_PHYS,
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| 		.end	= MSM_HSUSB_PHYS + MSM_HSUSB_SIZE,
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| 		.flags	= IORESOURCE_MEM,
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| 	},
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| 	{
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| 		.start	= INT_USB_HS,
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| 		.end	= INT_USB_HS,
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| 		.flags	= IORESOURCE_IRQ,
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| 	},
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| };
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| 
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| struct platform_device msm_device_hsusb = {
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| 	.name		= "msm_hsusb",
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| 	.id		= -1,
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| 	.num_resources	= ARRAY_SIZE(resources_hsusb),
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| 	.resource	= resources_hsusb,
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| 	.dev		= {
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| 		.coherent_dma_mask	= 0xffffffff,
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| 	},
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| };
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| 
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| struct flash_platform_data msm_nand_data = {
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| 	.parts		= NULL,
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| 	.nr_parts	= 0,
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| };
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| 
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| static struct resource resources_nand[] = {
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| 	[0] = {
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| 		.start	= 7,
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| 		.end	= 7,
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| 		.flags	= IORESOURCE_DMA,
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| 	},
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| };
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| 
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| struct platform_device msm_device_nand = {
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| 	.name		= "msm_nand",
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| 	.id		= -1,
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| 	.num_resources	= ARRAY_SIZE(resources_nand),
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| 	.resource	= resources_nand,
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| 	.dev		= {
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| 		.platform_data	= &msm_nand_data,
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| 	},
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| };
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| 
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| struct platform_device msm_device_smd = {
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| 	.name	= "msm_smd",
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| 	.id	= -1,
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| };
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| 
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| static struct resource resources_sdc1[] = {
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| 	{
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| 		.start	= MSM_SDC1_PHYS,
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| 		.end	= MSM_SDC1_PHYS + MSM_SDC1_SIZE - 1,
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| 		.flags	= IORESOURCE_MEM,
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| 	},
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| 	{
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| 		.start	= INT_SDC1_0,
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| 		.end	= INT_SDC1_0,
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| 		.flags	= IORESOURCE_IRQ,
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| 		.name	= "cmd_irq",
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| 	},
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| 	{
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| 		.flags	= IORESOURCE_IRQ | IORESOURCE_DISABLED,
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| 		.name	= "status_irq"
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| 	},
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| 	{
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| 		.start	= 8,
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| 		.end	= 8,
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| 		.flags	= IORESOURCE_DMA,
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| 	},
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| };
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| 
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| static struct resource resources_sdc2[] = {
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| 	{
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| 		.start	= MSM_SDC2_PHYS,
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| 		.end	= MSM_SDC2_PHYS + MSM_SDC2_SIZE - 1,
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| 		.flags	= IORESOURCE_MEM,
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| 	},
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| 	{
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| 		.start	= INT_SDC2_0,
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| 		.end	= INT_SDC2_0,
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| 		.flags	= IORESOURCE_IRQ,
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| 		.name	= "cmd_irq",
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| 	},
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| 	{
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| 		.flags	= IORESOURCE_IRQ | IORESOURCE_DISABLED,
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| 		.name	= "status_irq"
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| 	},
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| 	{
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| 		.start	= 8,
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| 		.end	= 8,
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| 		.flags	= IORESOURCE_DMA,
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| 	},
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| };
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| 
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| static struct resource resources_sdc3[] = {
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| 	{
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| 		.start	= MSM_SDC3_PHYS,
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| 		.end	= MSM_SDC3_PHYS + MSM_SDC3_SIZE - 1,
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| 		.flags	= IORESOURCE_MEM,
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| 	},
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| 	{
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| 		.start	= INT_SDC3_0,
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| 		.end	= INT_SDC3_0,
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| 		.flags	= IORESOURCE_IRQ,
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| 		.name	= "cmd_irq",
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| 	},
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| 	{
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| 		.flags	= IORESOURCE_IRQ | IORESOURCE_DISABLED,
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| 		.name	= "status_irq"
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| 	},
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| 	{
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| 		.start	= 8,
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| 		.end	= 8,
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| 		.flags	= IORESOURCE_DMA,
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| 	},
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| };
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| 
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| static struct resource resources_sdc4[] = {
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| 	{
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| 		.start	= MSM_SDC4_PHYS,
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| 		.end	= MSM_SDC4_PHYS + MSM_SDC4_SIZE - 1,
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| 		.flags	= IORESOURCE_MEM,
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| 	},
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| 	{
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| 		.start	= INT_SDC4_0,
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| 		.end	= INT_SDC4_0,
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| 		.flags	= IORESOURCE_IRQ,
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| 		.name	= "cmd_irq",
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| 	},
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| 	{
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| 		.flags	= IORESOURCE_IRQ | IORESOURCE_DISABLED,
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| 		.name	= "status_irq"
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| 	},
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| 	{
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| 		.start	= 8,
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| 		.end	= 8,
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| 		.flags	= IORESOURCE_DMA,
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| 	},
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| };
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| 
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| struct platform_device msm_device_sdc1 = {
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| 	.name		= "msm_sdcc",
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| 	.id		= 1,
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| 	.num_resources	= ARRAY_SIZE(resources_sdc1),
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| 	.resource	= resources_sdc1,
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| 	.dev		= {
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| 		.coherent_dma_mask	= 0xffffffff,
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| 	},
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| };
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| 
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| struct platform_device msm_device_sdc2 = {
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| 	.name		= "msm_sdcc",
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| 	.id		= 2,
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| 	.num_resources	= ARRAY_SIZE(resources_sdc2),
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| 	.resource	= resources_sdc2,
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| 	.dev		= {
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| 		.coherent_dma_mask	= 0xffffffff,
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| 	},
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| };
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| 
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| struct platform_device msm_device_sdc3 = {
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| 	.name		= "msm_sdcc",
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| 	.id		= 3,
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| 	.num_resources	= ARRAY_SIZE(resources_sdc3),
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| 	.resource	= resources_sdc3,
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| 	.dev		= {
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| 		.coherent_dma_mask	= 0xffffffff,
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| 	},
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| };
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| 
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| struct platform_device msm_device_sdc4 = {
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| 	.name		= "msm_sdcc",
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| 	.id		= 4,
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| 	.num_resources	= ARRAY_SIZE(resources_sdc4),
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| 	.resource	= resources_sdc4,
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| 	.dev		= {
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| 		.coherent_dma_mask	= 0xffffffff,
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| 	},
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| };
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| 
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| static struct platform_device *msm_sdcc_devices[] __initdata = {
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| 	&msm_device_sdc1,
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| 	&msm_device_sdc2,
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| 	&msm_device_sdc3,
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| 	&msm_device_sdc4,
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| };
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| 
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| int __init msm_add_sdcc(unsigned int controller,
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| 			struct msm_mmc_platform_data *plat,
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| 			unsigned int stat_irq, unsigned long stat_irq_flags)
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| {
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| 	struct platform_device	*pdev;
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| 	struct resource *res;
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| 
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| 	if (controller < 1 || controller > 4)
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| 		return -EINVAL;
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| 
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| 	pdev = msm_sdcc_devices[controller-1];
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| 	pdev->dev.platform_data = plat;
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| 
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| 	res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "status_irq");
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| 	if (!res)
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| 		return -EINVAL;
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| 	else if (stat_irq) {
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| 		res->start = res->end = stat_irq;
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| 		res->flags &= ~IORESOURCE_DISABLED;
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| 		res->flags |= stat_irq_flags;
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| 	}
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| 
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| 	return platform_device_register(pdev);
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| }
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| 
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| static struct resource resources_mddi0[] = {
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| 	{
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| 		.start	= MSM_PMDH_PHYS,
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| 		.end	= MSM_PMDH_PHYS + MSM_PMDH_SIZE - 1,
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| 		.flags	= IORESOURCE_MEM,
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| 	},
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| 	{
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| 		.start	= INT_MDDI_PRI,
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| 		.end	= INT_MDDI_PRI,
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| 		.flags	= IORESOURCE_IRQ,
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| 	},
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| };
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| 
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| static struct resource resources_mddi1[] = {
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| 	{
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| 		.start	= MSM_EMDH_PHYS,
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| 		.end	= MSM_EMDH_PHYS + MSM_EMDH_SIZE - 1,
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| 		.flags	= IORESOURCE_MEM,
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| 	},
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| 	{
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| 		.start	= INT_MDDI_EXT,
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| 		.end	= INT_MDDI_EXT,
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| 		.flags	= IORESOURCE_IRQ,
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| 	},
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| };
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| 
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| struct platform_device msm_device_mddi0 = {
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| 	.name = "msm_mddi",
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| 	.id = 0,
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| 	.num_resources = ARRAY_SIZE(resources_mddi0),
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| 	.resource = resources_mddi0,
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| 	.dev = {
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| 		.coherent_dma_mask      = 0xffffffff,
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| 	},
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| };
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| 
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| struct platform_device msm_device_mddi1 = {
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| 	.name = "msm_mddi",
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| 	.id = 1,
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| 	.num_resources = ARRAY_SIZE(resources_mddi1),
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| 	.resource = resources_mddi1,
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| 	.dev = {
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| 		.coherent_dma_mask      = 0xffffffff,
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| 	},
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| };
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| 
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| static struct resource resources_mdp[] = {
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| 	{
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| 		.start	= MSM_MDP_PHYS,
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| 		.end	= MSM_MDP_PHYS + MSM_MDP_SIZE - 1,
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| 		.name	= "mdp",
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| 		.flags	= IORESOURCE_MEM
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| 	},
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| 	{
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| 		.start	= INT_MDP,
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| 		.end	= INT_MDP,
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| 		.flags	= IORESOURCE_IRQ,
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| 	},
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| };
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| 
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| struct platform_device msm_device_mdp = {
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| 	.name = "msm_mdp",
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| 	.id = 0,
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| 	.num_resources = ARRAY_SIZE(resources_mdp),
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| 	.resource = resources_mdp,
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| };
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| 
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| struct clk_lookup msm_clocks_7x01a[] = {
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| 	CLK_PCOM("adm_clk",	ADM_CLK,	NULL, 0),
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| 	CLK_PCOM("adsp_clk",	ADSP_CLK,	NULL, 0),
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| 	CLK_PCOM("ebi1_clk",	EBI1_CLK,	NULL, 0),
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| 	CLK_PCOM("ebi2_clk",	EBI2_CLK,	NULL, 0),
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| 	CLK_PCOM("ecodec_clk",	ECODEC_CLK,	NULL, 0),
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| 	CLK_PCOM("emdh_clk",	EMDH_CLK,	NULL, OFF),
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| 	CLK_PCOM("gp_clk",		GP_CLK,		NULL, 0),
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| 	CLK_PCOM("grp_clk",	GRP_3D_CLK,	NULL, OFF),
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| 	CLK_PCOM("i2c_clk",	I2C_CLK,	"msm_i2c.0", 0),
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| 	CLK_PCOM("icodec_rx_clk",	ICODEC_RX_CLK,	NULL, 0),
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| 	CLK_PCOM("icodec_tx_clk",	ICODEC_TX_CLK,	NULL, 0),
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| 	CLK_PCOM("imem_clk",	IMEM_CLK,	NULL, OFF),
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| 	CLK_PCOM("mdc_clk",	MDC_CLK,	NULL, 0),
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| 	CLK_PCOM("mdp_clk",	MDP_CLK,	NULL, OFF),
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| 	CLK_PCOM("pbus_clk",	PBUS_CLK,	NULL, 0),
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| 	CLK_PCOM("pcm_clk",	PCM_CLK,	NULL, 0),
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| 	CLK_PCOM("mddi_clk",	PMDH_CLK,	NULL, OFF | CLK_MINMAX),
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| 	CLK_PCOM("sdac_clk",	SDAC_CLK,	NULL, OFF),
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| 	CLK_PCOM("sdc_clk",	SDC1_CLK,	"msm_sdcc.1", OFF),
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| 	CLK_PCOM("sdc_pclk",	SDC1_P_CLK,	"msm_sdcc.1", OFF),
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| 	CLK_PCOM("sdc_clk",	SDC2_CLK,	"msm_sdcc.2", OFF),
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| 	CLK_PCOM("sdc_pclk",	SDC2_P_CLK,	"msm_sdcc.2", OFF),
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| 	CLK_PCOM("sdc_clk",	SDC3_CLK,	"msm_sdcc.3", OFF),
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| 	CLK_PCOM("sdc_pclk",	SDC3_P_CLK,	"msm_sdcc.3", OFF),
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| 	CLK_PCOM("sdc_clk",	SDC4_CLK,	"msm_sdcc.4", OFF),
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| 	CLK_PCOM("sdc_pclk",	SDC4_P_CLK,	"msm_sdcc.4", OFF),
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| 	CLK_PCOM("tsif_clk",	TSIF_CLK,	NULL, 0),
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| 	CLK_PCOM("tsif_ref_clk",	TSIF_REF_CLK,	NULL, 0),
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| 	CLK_PCOM("tv_dac_clk",	TV_DAC_CLK,	NULL, 0),
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| 	CLK_PCOM("tv_enc_clk",	TV_ENC_CLK,	NULL, 0),
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| 	CLK_PCOM("uart_clk",	UART1_CLK,	"msm_serial.0", OFF),
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| 	CLK_PCOM("uart_clk",	UART2_CLK,	"msm_serial.1", 0),
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| 	CLK_PCOM("uart_clk",	UART3_CLK,	"msm_serial.2", OFF),
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| 	CLK_PCOM("uart1dm_clk",	UART1DM_CLK,	NULL, OFF),
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| 	CLK_PCOM("uart2dm_clk",	UART2DM_CLK,	NULL, 0),
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| 	CLK_PCOM("usb_hs_clk",	USB_HS_CLK,	"msm_hsusb", OFF),
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| 	CLK_PCOM("usb_hs_pclk",	USB_HS_P_CLK,	"msm_hsusb", OFF),
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| 	CLK_PCOM("usb_otg_clk",	USB_OTG_CLK,	NULL, 0),
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| 	CLK_PCOM("vdc_clk",	VDC_CLK,	NULL, OFF ),
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| 	CLK_PCOM("vfe_clk",	VFE_CLK,	NULL, OFF),
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| 	CLK_PCOM("vfe_mdc_clk",	VFE_MDC_CLK,	NULL, OFF),
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| };
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| 
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| unsigned msm_num_clocks_7x01a = ARRAY_SIZE(msm_clocks_7x01a);
 |