 6bb27d7349
			
		
	
	
	6bb27d7349
	
	
	
		
			
			Now that the only field in struct sys_timer is .init, delete the struct, and replace the machine descriptor .timer field with the initialization function itself. This will enable moving timer drivers into drivers/clocksource without having to place a public prototype of each struct sys_timer object into include/linux; the intent is to create a single of_clocksource_init() function that determines which timer driver to initialize by scanning the device dtree, much like the proposed irqchip_init() at: http://www.spinics.net/lists/arm-kernel/msg203686.html Includes mach-omap2 fixes from Igor Grinberg. Tested-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Stephen Warren <swarren@nvidia.com>
		
			
				
	
	
		
			321 lines
		
	
	
	
		
			8.2 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			321 lines
		
	
	
	
		
			8.2 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Copyright (C) 2009 Eric Benard - eric@eukrea.com
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|  *
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|  * Based on pcm038.c which is :
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|  * Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
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|  * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
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|  *
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|  * This program is free software; you can redistribute it and/or
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|  * modify it under the terms of the GNU General Public License
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|  * as published by the Free Software Foundation; either version 2
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|  * of the License, or (at your option) any later version.
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|  * This program is distributed in the hope that it will be useful,
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|  * but WITHOUT ANY WARRANTY; without even the implied warranty of
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|  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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|  * GNU General Public License for more details.
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|  *
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|  * You should have received a copy of the GNU General Public License
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|  * along with this program; if not, write to the Free Software
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|  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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|  * MA 02110-1301, USA.
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|  */
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| 
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| #include <linux/i2c.h>
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| #include <linux/io.h>
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| #include <linux/mtd/plat-ram.h>
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| #include <linux/mtd/physmap.h>
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| #include <linux/platform_device.h>
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| #include <linux/serial_8250.h>
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| #include <linux/usb/otg.h>
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| #include <linux/usb/ulpi.h>
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| 
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| #include <asm/mach-types.h>
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| #include <asm/mach/arch.h>
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| #include <asm/mach/time.h>
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| #include <asm/mach/map.h>
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| 
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| #include "common.h"
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| #include "devices-imx27.h"
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| #include "eukrea-baseboards.h"
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| #include "hardware.h"
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| #include "iomux-mx27.h"
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| #include "ulpi.h"
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| 
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| static const int eukrea_cpuimx27_pins[] __initconst = {
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| 	/* UART1 */
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| 	PE12_PF_UART1_TXD,
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| 	PE13_PF_UART1_RXD,
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| 	PE14_PF_UART1_CTS,
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| 	PE15_PF_UART1_RTS,
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| 	/* UART4 */
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| #if defined(MACH_EUKREA_CPUIMX27_USEUART4)
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| 	PB26_AF_UART4_RTS,
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| 	PB28_AF_UART4_TXD,
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| 	PB29_AF_UART4_CTS,
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| 	PB31_AF_UART4_RXD,
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| #endif
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| 	/* FEC */
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| 	PD0_AIN_FEC_TXD0,
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| 	PD1_AIN_FEC_TXD1,
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| 	PD2_AIN_FEC_TXD2,
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| 	PD3_AIN_FEC_TXD3,
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| 	PD4_AOUT_FEC_RX_ER,
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| 	PD5_AOUT_FEC_RXD1,
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| 	PD6_AOUT_FEC_RXD2,
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| 	PD7_AOUT_FEC_RXD3,
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| 	PD8_AF_FEC_MDIO,
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| 	PD9_AIN_FEC_MDC,
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| 	PD10_AOUT_FEC_CRS,
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| 	PD11_AOUT_FEC_TX_CLK,
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| 	PD12_AOUT_FEC_RXD0,
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| 	PD13_AOUT_FEC_RX_DV,
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| 	PD14_AOUT_FEC_RX_CLK,
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| 	PD15_AOUT_FEC_COL,
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| 	PD16_AIN_FEC_TX_ER,
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| 	PF23_AIN_FEC_TX_EN,
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| 	/* I2C1 */
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| 	PD17_PF_I2C_DATA,
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| 	PD18_PF_I2C_CLK,
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| 	/* SDHC2 */
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| #if defined(CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2)
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| 	PB4_PF_SD2_D0,
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| 	PB5_PF_SD2_D1,
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| 	PB6_PF_SD2_D2,
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| 	PB7_PF_SD2_D3,
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| 	PB8_PF_SD2_CMD,
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| 	PB9_PF_SD2_CLK,
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| #endif
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| #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
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| 	/* Quad UART's IRQ */
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| 	GPIO_PORTB | 22 | GPIO_GPIO | GPIO_IN,
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| 	GPIO_PORTB | 23 | GPIO_GPIO | GPIO_IN,
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| 	GPIO_PORTB | 27 | GPIO_GPIO | GPIO_IN,
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| 	GPIO_PORTB | 30 | GPIO_GPIO | GPIO_IN,
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| #endif
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| 	/* OTG */
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| 	PC7_PF_USBOTG_DATA5,
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| 	PC8_PF_USBOTG_DATA6,
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| 	PC9_PF_USBOTG_DATA0,
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| 	PC10_PF_USBOTG_DATA2,
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| 	PC11_PF_USBOTG_DATA1,
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| 	PC12_PF_USBOTG_DATA4,
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| 	PC13_PF_USBOTG_DATA3,
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| 	PE0_PF_USBOTG_NXT,
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| 	PE1_PF_USBOTG_STP,
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| 	PE2_PF_USBOTG_DIR,
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| 	PE24_PF_USBOTG_CLK,
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| 	PE25_PF_USBOTG_DATA7,
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| 	/* USBH2 */
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| 	PA0_PF_USBH2_CLK,
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| 	PA1_PF_USBH2_DIR,
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| 	PA2_PF_USBH2_DATA7,
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| 	PA3_PF_USBH2_NXT,
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| 	PA4_PF_USBH2_STP,
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| 	PD19_AF_USBH2_DATA4,
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| 	PD20_AF_USBH2_DATA3,
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| 	PD21_AF_USBH2_DATA6,
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| 	PD22_AF_USBH2_DATA0,
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| 	PD23_AF_USBH2_DATA2,
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| 	PD24_AF_USBH2_DATA1,
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| 	PD26_AF_USBH2_DATA5,
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| };
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| 
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| static struct physmap_flash_data eukrea_cpuimx27_flash_data = {
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| 	.width = 2,
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| };
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| 
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| static struct resource eukrea_cpuimx27_flash_resource = {
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| 	.start = 0xc0000000,
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| 	.end   = 0xc3ffffff,
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| 	.flags = IORESOURCE_MEM,
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| };
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| 
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| static struct platform_device eukrea_cpuimx27_nor_mtd_device = {
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| 	.name = "physmap-flash",
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| 	.id = 0,
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| 	.dev = {
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| 		.platform_data = &eukrea_cpuimx27_flash_data,
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| 	},
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| 	.num_resources = 1,
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| 	.resource = &eukrea_cpuimx27_flash_resource,
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| };
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| 
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| static const struct imxuart_platform_data uart_pdata __initconst = {
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| 	.flags = IMXUART_HAVE_RTSCTS,
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| };
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| 
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| static const struct mxc_nand_platform_data
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| cpuimx27_nand_board_info __initconst = {
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| 	.width = 1,
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| 	.hw_ecc = 1,
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| };
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| 
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| static struct platform_device *platform_devices[] __initdata = {
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| 	&eukrea_cpuimx27_nor_mtd_device,
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| };
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| 
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| static const struct imxi2c_platform_data cpuimx27_i2c1_data __initconst = {
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| 	.bitrate = 100000,
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| };
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| 
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| static struct i2c_board_info eukrea_cpuimx27_i2c_devices[] = {
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| 	{
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| 		I2C_BOARD_INFO("pcf8563", 0x51),
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| 	},
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| };
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| 
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| #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
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| static struct plat_serial8250_port serial_platform_data[] = {
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| 	{
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| 		.mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x200000),
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| 		/* irq number is run-time assigned */
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| 		.uartclk = 14745600,
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| 		.regshift = 1,
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| 		.iotype = UPIO_MEM,
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| 		.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
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| 	}, {
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| 		.mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x400000),
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| 		/* irq number is run-time assigned */
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| 		.uartclk = 14745600,
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| 		.regshift = 1,
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| 		.iotype = UPIO_MEM,
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| 		.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
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| 	}, {
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| 		.mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x800000),
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| 		/* irq number is run-time assigned */
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| 		.uartclk = 14745600,
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| 		.regshift = 1,
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| 		.iotype = UPIO_MEM,
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| 		.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
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| 	}, {
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| 		.mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x1000000),
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| 		/* irq number is run-time assigned */
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| 		.uartclk = 14745600,
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| 		.regshift = 1,
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| 		.iotype = UPIO_MEM,
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| 		.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
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| 	}, {
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| 	}
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| };
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| 
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| static struct platform_device serial_device = {
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| 	.name = "serial8250",
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| 	.id = 0,
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| 	.dev = {
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| 		.platform_data = serial_platform_data,
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| 	},
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| };
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| #endif
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| 
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| static int eukrea_cpuimx27_otg_init(struct platform_device *pdev)
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| {
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| 	return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI);
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| }
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| 
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| static struct mxc_usbh_platform_data otg_pdata __initdata = {
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| 	.init	= eukrea_cpuimx27_otg_init,
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| 	.portsc	= MXC_EHCI_MODE_ULPI,
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| };
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| 
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| static int eukrea_cpuimx27_usbh2_init(struct platform_device *pdev)
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| {
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| 	return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI);
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| }
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| 
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| static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
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| 	.init	= eukrea_cpuimx27_usbh2_init,
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| 	.portsc	= MXC_EHCI_MODE_ULPI,
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| };
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| 
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| static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {
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| 	.operating_mode = FSL_USB2_DR_DEVICE,
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| 	.phy_mode       = FSL_USB2_PHY_ULPI,
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| };
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| 
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| static bool otg_mode_host __initdata;
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| 
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| static int __init eukrea_cpuimx27_otg_mode(char *options)
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| {
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| 	if (!strcmp(options, "host"))
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| 		otg_mode_host = true;
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| 	else if (!strcmp(options, "device"))
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| 		otg_mode_host = false;
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| 	else
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| 		pr_info("otg_mode neither \"host\" nor \"device\". "
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| 			"Defaulting to device\n");
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| 	return 1;
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| }
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| __setup("otg_mode=", eukrea_cpuimx27_otg_mode);
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| 
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| static void __init eukrea_cpuimx27_init(void)
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| {
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| 	imx27_soc_init();
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| 
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| 	mxc_gpio_setup_multiple_pins(eukrea_cpuimx27_pins,
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| 		ARRAY_SIZE(eukrea_cpuimx27_pins), "CPUIMX27");
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| 
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| 	imx27_add_imx_uart0(&uart_pdata);
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| 
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| 	imx27_add_mxc_nand(&cpuimx27_nand_board_info);
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| 
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| 	i2c_register_board_info(0, eukrea_cpuimx27_i2c_devices,
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| 				ARRAY_SIZE(eukrea_cpuimx27_i2c_devices));
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| 
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| 	imx27_add_imx_i2c(0, &cpuimx27_i2c1_data);
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| 
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| 	imx27_add_fec(NULL);
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| 	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
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| 	imx27_add_imx2_wdt();
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| 	imx27_add_mxc_w1();
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| 
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| #if defined(CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2)
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| 	/* SDHC2 can be used for Wifi */
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| 	imx27_add_mxc_mmc(1, NULL);
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| #endif
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| #if defined(MACH_EUKREA_CPUIMX27_USEUART4)
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| 	/* in which case UART4 is also used for Bluetooth */
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| 	imx27_add_imx_uart3(&uart_pdata);
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| #endif
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| 
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| #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
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| 	serial_platform_data[0].irq = IMX_GPIO_NR(2, 23);
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| 	serial_platform_data[1].irq = IMX_GPIO_NR(2, 22);
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| 	serial_platform_data[2].irq = IMX_GPIO_NR(2, 27);
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| 	serial_platform_data[3].irq = IMX_GPIO_NR(2, 30);
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| 	platform_device_register(&serial_device);
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| #endif
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| 
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| 	if (otg_mode_host) {
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| 		otg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
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| 				ULPI_OTG_DRVVBUS_EXT);
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| 		if (otg_pdata.otg)
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| 			imx27_add_mxc_ehci_otg(&otg_pdata);
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| 	} else {
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| 		imx27_add_fsl_usb2_udc(&otg_device_pdata);
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| 	}
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| 
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| 	usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
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| 			ULPI_OTG_DRVVBUS_EXT);
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| 	if (usbh2_pdata.otg)
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| 		imx27_add_mxc_ehci_hs(2, &usbh2_pdata);
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| 
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| #ifdef CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD
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| 	eukrea_mbimx27_baseboard_init();
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| #endif
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| }
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| 
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| static void __init eukrea_cpuimx27_timer_init(void)
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| {
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| 	mx27_clocks_init(26000000);
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| }
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| 
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| MACHINE_START(EUKREA_CPUIMX27, "EUKREA CPUIMX27")
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| 	.atag_offset = 0x100,
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| 	.map_io = mx27_map_io,
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| 	.init_early = imx27_init_early,
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| 	.init_irq = mx27_init_irq,
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| 	.handle_irq = imx27_handle_irq,
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| 	.init_time	= eukrea_cpuimx27_timer_init,
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| 	.init_machine = eukrea_cpuimx27_init,
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| 	.restart	= mxc_restart,
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| MACHINE_END
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