 50f2de6126
			
		
	
	
	50f2de6126
	
	
	
		
			
			It moves a bunch of header files included in hardware.h and itself from mach-imx/include/mach to mach-imx, and updates users to include hardware.h rather than mach/hardware.h. The files in mach-imx/devices will need to include "../hardware.h". Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Arnd Bergmann <arnd@arndb.de>
		
			
				
	
	
		
			213 lines
		
	
	
	
		
			5.6 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			213 lines
		
	
	
	
		
			5.6 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
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|  * Copyright (C) 2010 Jason Wang <jason77.wang@gmail.com>
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|  *
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|  * The code contained herein is licensed under the GNU General Public
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|  * License. You may obtain a copy of the GNU General Public License
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|  * Version 2 or later at the following locations:
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|  *
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|  * http://www.opensource.org/licenses/gpl-license.html
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|  * http://www.gnu.org/copyleft/gpl.html
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|  */
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| 
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| #include <linux/interrupt.h>
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| #include <linux/irq.h>
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| #include <linux/irqdomain.h>
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| #include <linux/io.h>
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| #include <linux/platform_device.h>
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| #include <linux/gpio.h>
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| #include <linux/module.h>
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| #include <linux/smsc911x.h>
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| #include <linux/regulator/machine.h>
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| #include <linux/regulator/fixed.h>
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| 
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| #include "hardware.h"
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| 
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| /* LAN9217 ethernet base address */
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| #define LAN9217_BASE_ADDR(n)	(n + 0x0)
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| /* External UART */
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| #define UARTA_BASE_ADDR(n)	(n + 0x8000)
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| #define UARTB_BASE_ADDR(n)	(n + 0x10000)
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| 
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| #define BOARD_IO_ADDR(n)	(n + 0x20000)
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| /* LED switchs */
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| #define LED_SWITCH_REG		0x00
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| /* buttons */
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| #define SWITCH_BUTTONS_REG	0x08
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| /* status, interrupt */
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| #define INTR_STATUS_REG	0x10
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| #define INTR_MASK_REG		0x38
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| #define INTR_RESET_REG		0x20
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| /* magic word for debug CPLD */
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| #define MAGIC_NUMBER1_REG	0x40
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| #define MAGIC_NUMBER2_REG	0x48
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| /* CPLD code version */
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| #define CPLD_CODE_VER_REG	0x50
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| /* magic word for debug CPLD */
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| #define MAGIC_NUMBER3_REG	0x58
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| /* module reset register*/
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| #define MODULE_RESET_REG	0x60
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| /* CPU ID and Personality ID */
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| #define MCU_BOARD_ID_REG	0x68
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| 
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| #define MXC_MAX_EXP_IO_LINES	16
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| 
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| /* interrupts like external uart , external ethernet etc*/
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| #define EXPIO_INT_ENET		0
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| #define EXPIO_INT_XUART_A	1
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| #define EXPIO_INT_XUART_B	2
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| #define EXPIO_INT_BUTTON_A	3
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| #define EXPIO_INT_BUTTON_B	4
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| 
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| static void __iomem *brd_io;
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| static struct irq_domain *domain;
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| 
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| static struct resource smsc911x_resources[] = {
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| 	{
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| 		.flags = IORESOURCE_MEM,
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| 	} , {
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| 		.flags = IORESOURCE_IRQ,
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| 	},
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| };
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| 
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| static struct smsc911x_platform_config smsc911x_config = {
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| 	.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
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| 	.flags = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY,
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| };
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| 
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| static struct platform_device smsc_lan9217_device = {
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| 	.name = "smsc911x",
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| 	.id = -1,
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| 	.dev = {
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| 		.platform_data = &smsc911x_config,
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| 	},
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| 	.num_resources = ARRAY_SIZE(smsc911x_resources),
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| 	.resource = smsc911x_resources,
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| };
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| 
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| static void mxc_expio_irq_handler(u32 irq, struct irq_desc *desc)
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| {
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| 	u32 imr_val;
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| 	u32 int_valid;
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| 	u32 expio_irq;
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| 
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| 	/* irq = gpio irq number */
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| 	desc->irq_data.chip->irq_mask(&desc->irq_data);
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| 
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| 	imr_val = __raw_readw(brd_io + INTR_MASK_REG);
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| 	int_valid = __raw_readw(brd_io + INTR_STATUS_REG) & ~imr_val;
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| 
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| 	expio_irq = 0;
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| 	for (; int_valid != 0; int_valid >>= 1, expio_irq++) {
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| 		if ((int_valid & 1) == 0)
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| 			continue;
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| 		generic_handle_irq(irq_find_mapping(domain, expio_irq));
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| 	}
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| 
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| 	desc->irq_data.chip->irq_ack(&desc->irq_data);
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| 	desc->irq_data.chip->irq_unmask(&desc->irq_data);
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| }
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| 
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| /*
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|  * Disable an expio pin's interrupt by setting the bit in the imr.
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|  * Irq is an expio virtual irq number
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|  */
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| static void expio_mask_irq(struct irq_data *d)
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| {
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| 	u16 reg;
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| 	u32 expio = d->hwirq;
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| 
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| 	reg = __raw_readw(brd_io + INTR_MASK_REG);
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| 	reg |= (1 << expio);
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| 	__raw_writew(reg, brd_io + INTR_MASK_REG);
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| }
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| 
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| static void expio_ack_irq(struct irq_data *d)
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| {
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| 	u32 expio = d->hwirq;
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| 
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| 	__raw_writew(1 << expio, brd_io + INTR_RESET_REG);
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| 	__raw_writew(0, brd_io + INTR_RESET_REG);
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| 	expio_mask_irq(d);
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| }
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| 
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| static void expio_unmask_irq(struct irq_data *d)
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| {
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| 	u16 reg;
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| 	u32 expio = d->hwirq;
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| 
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| 	reg = __raw_readw(brd_io + INTR_MASK_REG);
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| 	reg &= ~(1 << expio);
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| 	__raw_writew(reg, brd_io + INTR_MASK_REG);
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| }
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| 
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| static struct irq_chip expio_irq_chip = {
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| 	.irq_ack = expio_ack_irq,
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| 	.irq_mask = expio_mask_irq,
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| 	.irq_unmask = expio_unmask_irq,
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| };
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| 
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| static struct regulator_consumer_supply dummy_supplies[] = {
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| 	REGULATOR_SUPPLY("vdd33a", "smsc911x"),
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| 	REGULATOR_SUPPLY("vddvario", "smsc911x"),
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| };
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| 
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| int __init mxc_expio_init(u32 base, u32 intr_gpio)
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| {
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| 	u32 p_irq = gpio_to_irq(intr_gpio);
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| 	int irq_base;
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| 	int i;
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| 
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| 	brd_io = ioremap(BOARD_IO_ADDR(base), SZ_4K);
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| 	if (brd_io == NULL)
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| 		return -ENOMEM;
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| 
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| 	if ((__raw_readw(brd_io + MAGIC_NUMBER1_REG) != 0xAAAA) ||
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| 	    (__raw_readw(brd_io + MAGIC_NUMBER2_REG) != 0x5555) ||
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| 	    (__raw_readw(brd_io + MAGIC_NUMBER3_REG) != 0xCAFE)) {
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| 		pr_info("3-Stack Debug board not detected\n");
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| 		iounmap(brd_io);
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| 		brd_io = NULL;
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| 		return -ENODEV;
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| 	}
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| 
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| 	pr_info("3-Stack Debug board detected, rev = 0x%04X\n",
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| 		readw(brd_io + CPLD_CODE_VER_REG));
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| 
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| 	/*
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| 	 * Configure INT line as GPIO input
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| 	 */
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| 	gpio_request(intr_gpio, "expio_pirq");
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| 	gpio_direction_input(intr_gpio);
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| 
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| 	/* disable the interrupt and clear the status */
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| 	__raw_writew(0, brd_io + INTR_MASK_REG);
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| 	__raw_writew(0xFFFF, brd_io + INTR_RESET_REG);
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| 	__raw_writew(0, brd_io + INTR_RESET_REG);
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| 	__raw_writew(0x1F, brd_io + INTR_MASK_REG);
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| 
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| 	irq_base = irq_alloc_descs(-1, 0, MXC_MAX_EXP_IO_LINES, numa_node_id());
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| 	WARN_ON(irq_base < 0);
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| 
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| 	domain = irq_domain_add_legacy(NULL, MXC_MAX_EXP_IO_LINES, irq_base, 0,
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| 				       &irq_domain_simple_ops, NULL);
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| 	WARN_ON(!domain);
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| 
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| 	for (i = irq_base; i < irq_base + MXC_MAX_EXP_IO_LINES; i++) {
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| 		irq_set_chip_and_handler(i, &expio_irq_chip, handle_level_irq);
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| 		set_irq_flags(i, IRQF_VALID);
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| 	}
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| 	irq_set_irq_type(p_irq, IRQF_TRIGGER_LOW);
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| 	irq_set_chained_handler(p_irq, mxc_expio_irq_handler);
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| 
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| 	/* Register Lan device on the debugboard */
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| 	regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
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| 
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| 	smsc911x_resources[0].start = LAN9217_BASE_ADDR(base);
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| 	smsc911x_resources[0].end = LAN9217_BASE_ADDR(base) + 0x100 - 1;
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| 	smsc911x_resources[1].start = irq_find_mapping(domain, EXPIO_INT_ENET);
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| 	smsc911x_resources[1].end = irq_find_mapping(domain, EXPIO_INT_ENET);
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| 	platform_device_register(&smsc_lan9217_device);
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| 
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| 	return 0;
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| }
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