862c588f06
The ARM architecture requires explicit branch predictor maintenance when updating an instruction stream for a given virtual address. In reality, this isn't so much of a burden because the branch predictor is flushed during the cache maintenance required to make the new instructions visible to the I-side of the processor. However, there are still some cases where explicit flushing is required, so add a local_bp_flush_all operation to deal with this. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
141 lines
3 KiB
C
141 lines
3 KiB
C
/*
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* linux/arch/arm/kernel/smp_tlb.c
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*
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* Copyright (C) 2002 ARM Limited, All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/preempt.h>
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#include <linux/smp.h>
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#include <asm/smp_plat.h>
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#include <asm/tlbflush.h>
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/**********************************************************************/
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/*
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* TLB operations
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*/
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struct tlb_args {
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struct vm_area_struct *ta_vma;
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unsigned long ta_start;
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unsigned long ta_end;
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};
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static inline void ipi_flush_tlb_all(void *ignored)
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{
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local_flush_tlb_all();
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}
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static inline void ipi_flush_tlb_mm(void *arg)
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{
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struct mm_struct *mm = (struct mm_struct *)arg;
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local_flush_tlb_mm(mm);
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}
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static inline void ipi_flush_tlb_page(void *arg)
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{
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struct tlb_args *ta = (struct tlb_args *)arg;
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local_flush_tlb_page(ta->ta_vma, ta->ta_start);
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}
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static inline void ipi_flush_tlb_kernel_page(void *arg)
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{
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struct tlb_args *ta = (struct tlb_args *)arg;
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local_flush_tlb_kernel_page(ta->ta_start);
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}
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static inline void ipi_flush_tlb_range(void *arg)
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{
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struct tlb_args *ta = (struct tlb_args *)arg;
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local_flush_tlb_range(ta->ta_vma, ta->ta_start, ta->ta_end);
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}
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static inline void ipi_flush_tlb_kernel_range(void *arg)
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{
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struct tlb_args *ta = (struct tlb_args *)arg;
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local_flush_tlb_kernel_range(ta->ta_start, ta->ta_end);
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}
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static inline void ipi_flush_bp_all(void *ignored)
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{
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local_flush_bp_all();
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}
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void flush_tlb_all(void)
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{
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if (tlb_ops_need_broadcast())
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on_each_cpu(ipi_flush_tlb_all, NULL, 1);
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else
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local_flush_tlb_all();
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}
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void flush_tlb_mm(struct mm_struct *mm)
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{
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if (tlb_ops_need_broadcast())
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on_each_cpu_mask(mm_cpumask(mm), ipi_flush_tlb_mm, mm, 1);
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else
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local_flush_tlb_mm(mm);
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}
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void flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
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{
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if (tlb_ops_need_broadcast()) {
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struct tlb_args ta;
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ta.ta_vma = vma;
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ta.ta_start = uaddr;
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on_each_cpu_mask(mm_cpumask(vma->vm_mm), ipi_flush_tlb_page,
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&ta, 1);
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} else
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local_flush_tlb_page(vma, uaddr);
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}
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void flush_tlb_kernel_page(unsigned long kaddr)
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{
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if (tlb_ops_need_broadcast()) {
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struct tlb_args ta;
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ta.ta_start = kaddr;
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on_each_cpu(ipi_flush_tlb_kernel_page, &ta, 1);
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} else
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local_flush_tlb_kernel_page(kaddr);
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}
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void flush_tlb_range(struct vm_area_struct *vma,
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unsigned long start, unsigned long end)
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{
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if (tlb_ops_need_broadcast()) {
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struct tlb_args ta;
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ta.ta_vma = vma;
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ta.ta_start = start;
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ta.ta_end = end;
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on_each_cpu_mask(mm_cpumask(vma->vm_mm), ipi_flush_tlb_range,
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&ta, 1);
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} else
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local_flush_tlb_range(vma, start, end);
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}
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void flush_tlb_kernel_range(unsigned long start, unsigned long end)
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{
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if (tlb_ops_need_broadcast()) {
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struct tlb_args ta;
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ta.ta_start = start;
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ta.ta_end = end;
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on_each_cpu(ipi_flush_tlb_kernel_range, &ta, 1);
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} else
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local_flush_tlb_kernel_range(start, end);
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}
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void flush_bp_all(void)
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{
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if (tlb_ops_need_broadcast())
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on_each_cpu(ipi_flush_bp_all, NULL, 1);
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else
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local_flush_bp_all();
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}
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