This allows us to move duplicated code in <asm/atomic.h> (atomic_inc_not_zero() for now) to <linux/atomic.h> Signed-off-by: Arun Sharma <asharma@fb.com> Reviewed-by: Eric Dumazet <eric.dumazet@gmail.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: David Miller <davem@davemloft.net> Cc: Eric Dumazet <eric.dumazet@gmail.com> Acked-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
		
			
				
	
	
		
			160 lines
		
	
	
	
		
			3.8 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			160 lines
		
	
	
	
		
			3.8 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
/* irq.c: FRV IRQ handling
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 *
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 * Copyright (C) 2003, 2004, 2006 Red Hat, Inc. All Rights Reserved.
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 * Written by David Howells (dhowells@redhat.com)
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 *
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 * This program is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU General Public License
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 * as published by the Free Software Foundation; either version
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 * 2 of the License, or (at your option) any later version.
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 */
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#include <linux/ptrace.h>
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#include <linux/errno.h>
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#include <linux/signal.h>
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#include <linux/sched.h>
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#include <linux/ioport.h>
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#include <linux/interrupt.h>
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#include <linux/timex.h>
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#include <linux/random.h>
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#include <linux/init.h>
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#include <linux/kernel_stat.h>
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#include <linux/irq.h>
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#include <linux/proc_fs.h>
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#include <linux/seq_file.h>
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#include <linux/module.h>
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#include <linux/bitops.h>
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#include <linux/atomic.h>
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#include <asm/io.h>
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#include <asm/smp.h>
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#include <asm/system.h>
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#include <asm/uaccess.h>
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#include <asm/pgalloc.h>
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#include <asm/delay.h>
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#include <asm/irq.h>
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#include <asm/irc-regs.h>
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#include <asm/gdb-stub.h>
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#define set_IRR(N,A,B,C,D) __set_IRR(N, (A << 28) | (B << 24) | (C << 20) | (D << 16))
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extern void __init fpga_init(void);
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#ifdef CONFIG_FUJITSU_MB93493
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extern void __init mb93493_init(void);
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#endif
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#define __reg16(ADDR) (*(volatile unsigned short *)(ADDR))
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atomic_t irq_err_count;
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int arch_show_interrupts(struct seq_file *p, int prec)
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{
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	seq_printf(p, "%*s: ", prec, "ERR");
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	seq_printf(p, "%10u\n", atomic_read(&irq_err_count));
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	return 0;
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}
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/*
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 * on-CPU PIC operations
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 */
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static void frv_cpupic_ack(struct irq_data *d)
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{
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	__clr_RC(d->irq);
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	__clr_IRL();
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}
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static void frv_cpupic_mask(struct irq_data *d)
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{
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	__set_MASK(d->irq);
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}
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static void frv_cpupic_mask_ack(struct irq_data *d)
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{
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	__set_MASK(d->irq);
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	__clr_RC(d->irq);
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	__clr_IRL();
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}
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static void frv_cpupic_unmask(struct irq_data *d)
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{
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	__clr_MASK(d->irq);
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}
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static struct irq_chip frv_cpu_pic = {
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	.name		= "cpu",
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	.irq_ack	= frv_cpupic_ack,
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	.irq_mask	= frv_cpupic_mask,
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	.irq_mask_ack	= frv_cpupic_mask_ack,
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	.irq_unmask	= frv_cpupic_unmask,
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};
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/*
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 * handles all normal device IRQs
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 * - registers are referred to by the __frame variable (GR28)
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 * - IRQ distribution is complicated in this arch because of the many PICs, the
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 *   way they work and the way they cascade
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 */
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asmlinkage void do_IRQ(void)
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{
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	irq_enter();
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	generic_handle_irq(__get_IRL());
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	irq_exit();
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}
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/*
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 * handles all NMIs when not co-opted by the debugger
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 * - registers are referred to by the __frame variable (GR28)
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 */
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asmlinkage void do_NMI(void)
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{
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}
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/*
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 * initialise the interrupt system
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 */
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void __init init_IRQ(void)
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{
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	int level;
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	for (level = 1; level <= 14; level++)
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		irq_set_chip_and_handler(level, &frv_cpu_pic,
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					 handle_level_irq);
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	irq_set_handler(IRQ_CPU_TIMER0, handle_edge_irq);
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	/* set the trigger levels for internal interrupt sources
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	 * - timers all falling-edge
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	 * - ERR0 is rising-edge
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	 * - all others are high-level
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	 */
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	__set_IITMR(0, 0x003f0000);	/* DMA0-3, TIMER0-2 */
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	__set_IITMR(1, 0x20000000);	/* ERR0-1, UART0-1, DMA4-7 */
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	/* route internal interrupts */
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	set_IRR(4, IRQ_DMA3_LEVEL, IRQ_DMA2_LEVEL, IRQ_DMA1_LEVEL,
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		IRQ_DMA0_LEVEL);
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	set_IRR(5, 0, IRQ_TIMER2_LEVEL, IRQ_TIMER1_LEVEL, IRQ_TIMER0_LEVEL);
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	set_IRR(6, IRQ_GDBSTUB_LEVEL, IRQ_GDBSTUB_LEVEL,
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		IRQ_UART1_LEVEL, IRQ_UART0_LEVEL);
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	set_IRR(7, IRQ_DMA7_LEVEL, IRQ_DMA6_LEVEL, IRQ_DMA5_LEVEL,
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		IRQ_DMA4_LEVEL);
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	/* route external interrupts */
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	set_IRR(2, IRQ_XIRQ7_LEVEL, IRQ_XIRQ6_LEVEL, IRQ_XIRQ5_LEVEL,
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		IRQ_XIRQ4_LEVEL);
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	set_IRR(3, IRQ_XIRQ3_LEVEL, IRQ_XIRQ2_LEVEL, IRQ_XIRQ1_LEVEL,
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		IRQ_XIRQ0_LEVEL);
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#if defined(CONFIG_MB93091_VDK)
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	__set_TM1(0x55550000);		/* XIRQ7-0 all active low */
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#elif defined(CONFIG_MB93093_PDK)
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	__set_TM1(0x15550000);		/* XIRQ7 active high, 6-0 all active low */
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#else
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#error dont know external IRQ trigger levels for this setup
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#endif
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	fpga_init();
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#ifdef CONFIG_FUJITSU_MB93493
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	mb93493_init();
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#endif
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}
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