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	c65f2abf54
	
	
	
		
			
			ixp2xxx platforms have had no real changes since ~2006 and the maintainer has said on irc that they can be removed: 13:05 < nico> do you still care about ixp2000? 13:22 < lennert> not really, no 13:58 < nico> do you think we could remove it from the kernel tree? 14:01 < lennert> go for it, and remove ixp23xx too while you're at it Removing will help simplify ARM consolidation in general and PCI re-work specifically. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Randy Dunlap <rdunlap@xenotime.net> Acked-by: Lennert Buytenhek <buytenh@wantstofly.org>
		
			
				
	
	
		
			34 lines
		
	
	
	
		
			877 B
			
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
			
		
		
	
	
			34 lines
		
	
	
	
		
			877 B
			
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
| /*
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|  * linux/arch/arm/boot/compressed/head-xscale.S
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|  *
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|  * XScale specific tweaks.  This is merged into head.S by the linker.
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|  *
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|  */
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| 
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| #include <linux/linkage.h>
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| 
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| 		.section        ".start", "ax"
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| 
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| __XScale_start:
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| 
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| 		@ Preserve r8/r7 i.e. kernel entry values
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| 
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| 		@ Data cache might be active.
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| 		@ Be sure to flush kernel binary out of the cache,
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| 		@ whatever state it is, before it is turned off.
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| 		@ This is done by fetching through currently executed
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| 		@ memory to be sure we hit the same cache.
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| 		bic	r2, pc, #0x1f
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| 		add	r3, r2, #0x10000	@ 64 kb is quite enough...
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| 1:		ldr	r0, [r2], #32
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| 		teq	r2, r3
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| 		bne	1b
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| 		mcr	p15, 0, r0, c7, c10, 4	@ drain WB
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| 		mcr	p15, 0, r0, c7, c7, 0	@ flush I & D caches
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| 
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| 		@ disabling MMU and caches
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| 		mrc	p15, 0, r0, c1, c0, 0	@ read control reg
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| 		bic	r0, r0, #0x05		@ clear DC, MMU
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| 		bic	r0, r0, #0x1000		@ clear Icache
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| 		mcr	p15, 0, r0, c1, c0, 0
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| 
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