0c2272170d
Commit d19f405a5a ("[media] s5p-mfc: Fix
selective sclk_mfc init") added support for special clock handling
(named "sclk-mfc"). However this clock is not defined yet on any
platform, so before adding it to all Exynos platform, better rename it
to "sclk_mfc" to match the scheme used for all other special clocks on
Exynos platform.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kamil Debski <k.debski@samsung.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
141 lines
2.8 KiB
C
141 lines
2.8 KiB
C
/*
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* linux/drivers/media/platform/s5p-mfc/s5p_mfc_pm.c
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*
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* Copyright (c) 2010 Samsung Electronics Co., Ltd.
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* http://www.samsung.com/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/platform_device.h>
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#ifdef CONFIG_PM_RUNTIME
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#include <linux/pm_runtime.h>
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#endif
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#include "s5p_mfc_common.h"
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#include "s5p_mfc_debug.h"
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#include "s5p_mfc_pm.h"
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#define MFC_GATE_CLK_NAME "mfc"
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#define MFC_SCLK_NAME "sclk_mfc"
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#define MFC_SCLK_RATE (200 * 1000000)
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#define CLK_DEBUG
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static struct s5p_mfc_pm *pm;
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static struct s5p_mfc_dev *p_dev;
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#ifdef CLK_DEBUG
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static atomic_t clk_ref;
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#endif
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int s5p_mfc_init_pm(struct s5p_mfc_dev *dev)
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{
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int ret = 0;
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pm = &dev->pm;
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p_dev = dev;
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pm->clock_gate = clk_get(&dev->plat_dev->dev, MFC_GATE_CLK_NAME);
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if (IS_ERR(pm->clock_gate)) {
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mfc_err("Failed to get clock-gating control\n");
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ret = PTR_ERR(pm->clock_gate);
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goto err_g_ip_clk;
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}
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ret = clk_prepare(pm->clock_gate);
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if (ret) {
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mfc_err("Failed to prepare clock-gating control\n");
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goto err_p_ip_clk;
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}
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if (dev->variant->version != MFC_VERSION_V6) {
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pm->clock = clk_get(&dev->plat_dev->dev, MFC_SCLK_NAME);
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if (IS_ERR(pm->clock)) {
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mfc_info("Failed to get MFC special clock control\n");
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} else {
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clk_set_rate(pm->clock, MFC_SCLK_RATE);
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ret = clk_prepare_enable(pm->clock);
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if (ret) {
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mfc_err("Failed to enable MFC special clock\n");
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goto err_s_clk;
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}
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}
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}
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atomic_set(&pm->power, 0);
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#ifdef CONFIG_PM_RUNTIME
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pm->device = &dev->plat_dev->dev;
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pm_runtime_enable(pm->device);
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#endif
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#ifdef CLK_DEBUG
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atomic_set(&clk_ref, 0);
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#endif
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return 0;
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err_s_clk:
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clk_put(pm->clock);
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err_p_ip_clk:
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clk_put(pm->clock_gate);
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err_g_ip_clk:
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return ret;
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}
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void s5p_mfc_final_pm(struct s5p_mfc_dev *dev)
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{
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if (dev->variant->version != MFC_VERSION_V6 &&
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pm->clock) {
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clk_disable_unprepare(pm->clock);
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clk_put(pm->clock);
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}
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clk_unprepare(pm->clock_gate);
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clk_put(pm->clock_gate);
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#ifdef CONFIG_PM_RUNTIME
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pm_runtime_disable(pm->device);
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#endif
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}
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int s5p_mfc_clock_on(void)
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{
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int ret;
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#ifdef CLK_DEBUG
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atomic_inc(&clk_ref);
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mfc_debug(3, "+ %d\n", atomic_read(&clk_ref));
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#endif
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ret = clk_enable(pm->clock_gate);
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return ret;
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}
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void s5p_mfc_clock_off(void)
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{
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#ifdef CLK_DEBUG
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atomic_dec(&clk_ref);
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mfc_debug(3, "- %d\n", atomic_read(&clk_ref));
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#endif
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clk_disable(pm->clock_gate);
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}
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int s5p_mfc_power_on(void)
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{
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#ifdef CONFIG_PM_RUNTIME
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return pm_runtime_get_sync(pm->device);
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#else
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atomic_set(&pm->power, 1);
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return 0;
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#endif
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}
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int s5p_mfc_power_off(void)
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{
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#ifdef CONFIG_PM_RUNTIME
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return pm_runtime_put_sync(pm->device);
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#else
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atomic_set(&pm->power, 0);
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return 0;
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#endif
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}
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