 cf377ad7d4
			
		
	
	
	cf377ad7d4
	
	
	
		
			
			New and updated SoC support. Among the things new for this release are:
 
 - at91: Added support for the new SAMA5D4 SoC, following the earlier SAMA5D3
 - bcm: Added support for BCM63XX family of DSL SoCs
 - hisi: Added support for HiP04 server-class SoC
 - meson: Initial support for the Amlogic Meson6 (aka 8726MX) platform
 - shmobile: added support for new r8a7794 (R-Car E2) automotive SoC
 
 Noteworthy changes to existing SoC support are:
 
 - imx: convert i.MX1 to device tree
 - omap: lots of power management work
 - omap: base support to enable moving to standard UART driver
 - shmobile: lots of progress for multiplatform support, still ongoing
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Merge tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform changes from Arnd Bergmann:
 "New and updated SoC support.  Among the things new for this release
  are:
   - at91: Added support for the new SAMA5D4 SoC, following the earlier
     SAMA5D3
   - bcm: Added support for BCM63XX family of DSL SoCs
   - hisi: Added support for HiP04 server-class SoC
   - meson: Initial support for the Amlogic Meson6 (aka 8726MX) platform
   - shmobile: added support for new r8a7794 (R-Car E2) automotive SoC
  Noteworthy changes to existing SoC support are:
   - imx: convert i.MX1 to device tree
   - omap: lots of power management work
   - omap: base support to enable moving to standard UART driver
   - shmobile: lots of progress for multiplatform support, still
     ongoing"
* tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (171 commits)
  ARM: hisi: depend on ARCH_MULTI_V7
  CNS3xxx: Fix debug UART.
  ARM: at91: fix nommu build regression
  ARM: meson: add basic support for MesonX SoCs
  ARM: meson: debug: add debug UART for earlyprintk support
  irq: Export handle_fasteoi_irq
  ARM: mediatek: Add earlyprintk support for mt6589
  ARM: hisi: Fix platmcpm compilation when ARMv6 is selected
  ARM: debug: fix alphanumerical order on debug uarts
  ARM: at91: document Atmel SMART compatibles
  ARM: at91: add sama5d4 support to sama5_defconfig
  ARM: at91: dt: add device tree file for SAMA5D4ek board
  ARM: at91: dt: add device tree file for SAMA5D4 SoC
  ARM: at91: SAMA5D4 SoC detection code and low level routines
  ARM: at91: introduce basic SAMA5D4 support
  clk: at91: add a driver for the h32mx clock
  ARM: pxa3xx: provide specific platform_devices for all ssp ports
  ARM: pxa: ssp: provide platform_device_id for PXA3xx
  ARM: OMAP4+: Remove static iotable mappings for SRAM
  ARM: OMAP4+: Move SRAM data to DT
  ...
		
	
			
		
			
				
	
	
		
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			309 lines
		
	
	
	
		
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| /*
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|  * Header for code common to all OMAP2+ machines.
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|  *
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|  * This program is free software; you can redistribute it and/or modify it
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|  * under the terms of the GNU General Public License as published by the
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|  * Free Software Foundation; either version 2 of the License, or (at your
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|  * option) any later version.
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|  *
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|  * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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|  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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|  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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|  * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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|  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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|  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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|  * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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|  * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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|  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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|  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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|  *
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|  * You should have received a copy of the  GNU General Public License along
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|  * with this program; if not, write  to the Free Software Foundation, Inc.,
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|  * 675 Mass Ave, Cambridge, MA 02139, USA.
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|  */
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| 
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| #ifndef __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
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| #define __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
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| #ifndef __ASSEMBLER__
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| 
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| #include <linux/irq.h>
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| #include <linux/delay.h>
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| #include <linux/i2c.h>
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| #include <linux/i2c/twl.h>
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| #include <linux/i2c-omap.h>
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| #include <linux/reboot.h>
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| #include <linux/irqchip/irq-omap-intc.h>
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| 
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| #include <asm/proc-fns.h>
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| 
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| #include "i2c.h"
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| #include "serial.h"
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| 
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| #include "usb.h"
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| 
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| #define OMAP_INTC_START		NR_IRQS
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| 
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| #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP2)
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| int omap2_pm_init(void);
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| #else
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| static inline int omap2_pm_init(void)
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| {
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| 	return 0;
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| }
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| #endif
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| 
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| #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
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| int omap3_pm_init(void);
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| #else
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| static inline int omap3_pm_init(void)
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| {
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| 	return 0;
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| }
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| #endif
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| 
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| #if defined(CONFIG_PM) && (defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX))
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| int omap4_pm_init(void);
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| int omap4_pm_init_early(void);
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| #else
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| static inline int omap4_pm_init(void)
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| {
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| 	return 0;
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| }
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| 
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| static inline int omap4_pm_init_early(void)
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| {
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| 	return 0;
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| }
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| #endif
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| 
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| #ifdef CONFIG_OMAP_MUX
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| int omap_mux_late_init(void);
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| #else
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| static inline int omap_mux_late_init(void)
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| {
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| 	return 0;
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| }
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| #endif
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| 
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| extern void omap2_init_common_infrastructure(void);
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| 
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| extern void omap2_sync32k_timer_init(void);
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| extern void omap3_sync32k_timer_init(void);
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| extern void omap3_secure_sync32k_timer_init(void);
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| extern void omap3_gptimer_timer_init(void);
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| extern void omap4_local_timer_init(void);
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| #ifdef CONFIG_CACHE_L2X0
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| int omap_l2_cache_init(void);
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| #else
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| static inline int omap_l2_cache_init(void)
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| {
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| 	return 0;
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| }
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| #endif
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| extern void omap5_realtime_timer_init(void);
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| 
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| void omap2420_init_early(void);
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| void omap2430_init_early(void);
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| void omap3430_init_early(void);
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| void omap35xx_init_early(void);
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| void omap3630_init_early(void);
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| void omap3_init_early(void);	/* Do not use this one */
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| void am33xx_init_early(void);
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| void am35xx_init_early(void);
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| void ti81xx_init_early(void);
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| void am33xx_init_early(void);
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| void am43xx_init_early(void);
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| void am43xx_init_late(void);
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| void omap4430_init_early(void);
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| void omap5_init_early(void);
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| void omap3_init_late(void);	/* Do not use this one */
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| void omap4430_init_late(void);
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| void omap2420_init_late(void);
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| void omap2430_init_late(void);
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| void omap3430_init_late(void);
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| void omap35xx_init_late(void);
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| void omap3630_init_late(void);
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| void am35xx_init_late(void);
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| void ti81xx_init_late(void);
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| void am33xx_init_late(void);
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| void omap5_init_late(void);
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| int omap2_common_pm_late_init(void);
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| void dra7xx_init_early(void);
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| void dra7xx_init_late(void);
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| 
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| #ifdef CONFIG_SOC_BUS
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| void omap_soc_device_init(void);
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| #else
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| static inline void omap_soc_device_init(void)
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| {
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| }
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| #endif
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| 
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| #if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430)
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| void omap2xxx_restart(enum reboot_mode mode, const char *cmd);
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| #else
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| static inline void omap2xxx_restart(enum reboot_mode mode, const char *cmd)
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| {
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| }
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| #endif
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| 
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| #ifdef CONFIG_SOC_AM33XX
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| void am33xx_restart(enum reboot_mode mode, const char *cmd);
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| #else
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| static inline void am33xx_restart(enum reboot_mode mode, const char *cmd)
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| {
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| }
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| #endif
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| 
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| #ifdef CONFIG_ARCH_OMAP3
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| void omap3xxx_restart(enum reboot_mode mode, const char *cmd);
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| #else
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| static inline void omap3xxx_restart(enum reboot_mode mode, const char *cmd)
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| {
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| }
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| #endif
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| 
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| #if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \
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| 	defined(CONFIG_SOC_DRA7XX) || defined(CONFIG_SOC_AM43XX)
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| void omap44xx_restart(enum reboot_mode mode, const char *cmd);
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| #else
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| static inline void omap44xx_restart(enum reboot_mode mode, const char *cmd)
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| {
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| }
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| #endif
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| 
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| /* This gets called from mach-omap2/io.c, do not call this */
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| void __init omap2_set_globals_tap(u32 class, void __iomem *tap);
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| 
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| void __init omap242x_map_io(void);
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| void __init omap243x_map_io(void);
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| void __init omap3_map_io(void);
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| void __init am33xx_map_io(void);
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| void __init omap4_map_io(void);
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| void __init omap5_map_io(void);
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| void __init ti81xx_map_io(void);
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| 
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| /* omap_barriers_init() is OMAP4 only */
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| void omap_barriers_init(void);
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| 
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| /**
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|  * omap_test_timeout - busy-loop, testing a condition
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|  * @cond: condition to test until it evaluates to true
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|  * @timeout: maximum number of microseconds in the timeout
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|  * @index: loop index (integer)
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|  *
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|  * Loop waiting for @cond to become true or until at least @timeout
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|  * microseconds have passed.  To use, define some integer @index in the
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|  * calling code.  After running, if @index == @timeout, then the loop has
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|  * timed out.
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|  */
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| #define omap_test_timeout(cond, timeout, index)			\
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| ({								\
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| 	for (index = 0; index < timeout; index++) {		\
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| 		if (cond)					\
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| 			break;					\
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| 		udelay(1);					\
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| 	}							\
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| })
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| 
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| extern struct device *omap2_get_mpuss_device(void);
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| extern struct device *omap2_get_iva_device(void);
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| extern struct device *omap2_get_l3_device(void);
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| extern struct device *omap4_get_dsp_device(void);
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| 
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| void omap_gic_of_init(void);
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| 
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| #ifdef CONFIG_CACHE_L2X0
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| extern void __iomem *omap4_get_l2cache_base(void);
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| #endif
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| 
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| struct device_node;
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| 
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| #ifdef CONFIG_SMP
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| extern void __iomem *omap4_get_scu_base(void);
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| #else
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| static inline void __iomem *omap4_get_scu_base(void)
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| {
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| 	return NULL;
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| }
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| #endif
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| 
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| extern void gic_dist_disable(void);
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| extern void gic_dist_enable(void);
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| extern bool gic_dist_disabled(void);
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| extern void gic_timer_retrigger(void);
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| extern void omap_smc1(u32 fn, u32 arg);
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| extern void __iomem *omap4_get_sar_ram_base(void);
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| extern void omap_do_wfi(void);
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| 
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| #ifdef CONFIG_SMP
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| /* Needed for secondary core boot */
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| extern void omap4_secondary_startup(void);
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| extern void omap4460_secondary_startup(void);
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| extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask);
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| extern void omap_auxcoreboot_addr(u32 cpu_addr);
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| extern u32 omap_read_auxcoreboot0(void);
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| 
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| extern void omap4_cpu_die(unsigned int cpu);
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| 
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| extern struct smp_operations omap4_smp_ops;
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| 
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| extern void omap5_secondary_startup(void);
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| #endif
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| 
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| #if defined(CONFIG_SMP) && defined(CONFIG_PM)
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| extern int omap4_mpuss_init(void);
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| extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state);
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| extern int omap4_finish_suspend(unsigned long cpu_state);
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| extern void omap4_cpu_resume(void);
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| extern int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state);
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| #else
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| static inline int omap4_enter_lowpower(unsigned int cpu,
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| 					unsigned int power_state)
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| {
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| 	cpu_do_idle();
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| 	return 0;
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| }
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| 
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| static inline int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state)
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| {
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| 	cpu_do_idle();
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| 	return 0;
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| }
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| 
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| static inline int omap4_mpuss_init(void)
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| {
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| 	return 0;
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| }
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| 
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| static inline int omap4_finish_suspend(unsigned long cpu_state)
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| {
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| 	return 0;
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| }
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| 
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| static inline void omap4_cpu_resume(void)
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| {}
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| 
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| #endif
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| 
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| void pdata_quirks_init(const struct of_device_id *);
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| void omap_auxdata_legacy_init(struct device *dev);
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| void omap_pcs_legacy_init(int irq, void (*rearm)(void));
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| 
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| struct omap_sdrc_params;
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| extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
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| 				      struct omap_sdrc_params *sdrc_cs1);
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| struct omap2_hsmmc_info;
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| extern void omap_reserve(void);
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| 
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| struct omap_hwmod;
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| extern int omap_dss_reset(struct omap_hwmod *);
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| 
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| /* SoC specific clock initializer */
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| int omap_clk_init(void);
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| 
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| int __init omapdss_init_of(void);
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| void __init omapdss_early_init_of(void);
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| 
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| #endif /* __ASSEMBLER__ */
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| #endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */
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