Optimized version of copy_page() was written with assumption that cache
line size is 32 bytes. On Cortex-A8 cache line size is 64 bytes.
This patch tries to generalize copy_page() to work with any cache line
size if cache line size is multiple of 16 and page size is multiple of
two cache line size.
After this optimization we've got ~25% speedup on OMAP3(tested in
userspace).
There is test for kernelspace which trigger copy-on-write after fork():
 #include <stdlib.h>
 #include <string.h>
 #include <unistd.h>
 #define BUF_SIZE (10000*4096)
 #define NFORK 200
 int main(int argc, char **argv)
 {
         char *buf = malloc(BUF_SIZE);
         int i;
         memset(buf, 0, BUF_SIZE);
         for(i = 0; i < NFORK; i++) {
                 if (fork()) {
                         wait(NULL);
                 } else {
                         int j;
                         for(j = 0; j < BUF_SIZE; j+= 4096)
                                 buf[j] = (j & 0xFF) + 1;
                         break;
                 }
         }
         free(buf);
         return 0;
 }
Before optimization this test takes ~66 seconds, after optimization
takes ~56 seconds.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@nokia.com>
Signed-off-by: Kirill A. Shutemov <kirill@shutemov.name>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
		
	
			
		
			
				
	
	
		
			47 lines
		
	
	
	
		
			1.3 KiB
			
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
			
		
		
	
	
			47 lines
		
	
	
	
		
			1.3 KiB
			
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
/*
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 *  linux/arch/arm/lib/copypage.S
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 *
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 *  Copyright (C) 1995-1999 Russell King
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 *
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 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License version 2 as
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 * published by the Free Software Foundation.
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 *
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 *  ASM optimised string functions
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 */
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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#include <asm/asm-offsets.h>
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#include <asm/cache.h>
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#define COPY_COUNT (PAGE_SZ / (2 * L1_CACHE_BYTES) PLD( -1 ))
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		.text
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		.align	5
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/*
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 * StrongARM optimised copy_page routine
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 * now 1.78bytes/cycle, was 1.60 bytes/cycle (50MHz bus -> 89MB/s)
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 * Note that we probably achieve closer to the 100MB/s target with
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 * the core clock switching.
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 */
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ENTRY(copy_page)
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		stmfd	sp!, {r4, lr}			@	2
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	PLD(	pld	[r1, #0]		)
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	PLD(	pld	[r1, #L1_CACHE_BYTES]		)
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		mov	r2, #COPY_COUNT			@	1
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		ldmia	r1!, {r3, r4, ip, lr}		@	4+1
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1:	PLD(	pld	[r1, #2 * L1_CACHE_BYTES])
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	PLD(	pld	[r1, #3 * L1_CACHE_BYTES])
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2:
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	.rept	(2 * L1_CACHE_BYTES / 16 - 1)
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		stmia	r0!, {r3, r4, ip, lr}		@	4
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		ldmia	r1!, {r3, r4, ip, lr}		@	4
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	.endr
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		subs	r2, r2, #1			@	1
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		stmia	r0!, {r3, r4, ip, lr}		@	4
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		ldmgtia	r1!, {r3, r4, ip, lr}		@	4
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		bgt	1b				@	1
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	PLD(	ldmeqia r1!, {r3, r4, ip, lr}	)
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	PLD(	beq	2b			)
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		ldmfd	sp!, {r4, pc}			@	3
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ENDPROC(copy_page)
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