Drop support to compile the kernel with gcc versions older than 3.3.3. This allows us to use the "Q" inline assembly contraint on some more inline assemblies without duplicating a lot of complex code (e.g. __xchg and __cmpxchg). The distinction for older gcc versions can be removed which saves a few lines and simplifies the code. Reviewed-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
		
			
				
	
	
		
			386 lines
		
	
	
	
		
			8.6 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			386 lines
		
	
	
	
		
			8.6 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
#ifndef _S390_RWSEM_H
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#define _S390_RWSEM_H
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/*
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 *  include/asm-s390/rwsem.h
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 *
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 *  S390 version
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 *    Copyright (C) 2002 IBM Deutschland Entwicklung GmbH, IBM Corporation
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 *    Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com)
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 *
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 *  Based on asm-alpha/semaphore.h and asm-i386/rwsem.h
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 */
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/*
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 *
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 * The MSW of the count is the negated number of active writers and waiting
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 * lockers, and the LSW is the total number of active locks
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 *
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 * The lock count is initialized to 0 (no active and no waiting lockers).
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 *
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 * When a writer subtracts WRITE_BIAS, it'll get 0xffff0001 for the case of an
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 * uncontended lock. This can be determined because XADD returns the old value.
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 * Readers increment by 1 and see a positive value when uncontended, negative
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 * if there are writers (and maybe) readers waiting (in which case it goes to
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 * sleep).
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 *
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 * The value of WAITING_BIAS supports up to 32766 waiting processes. This can
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 * be extended to 65534 by manually checking the whole MSW rather than relying
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 * on the S flag.
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 *
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 * The value of ACTIVE_BIAS supports up to 65535 active processes.
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 *
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 * This should be totally fair - if anything is waiting, a process that wants a
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 * lock will go to the back of the queue. When the currently active lock is
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 * released, if there's a writer at the front of the queue, then that and only
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 * that will be woken up; if there's a bunch of consequtive readers at the
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 * front, then they'll all be woken up, but no other readers will be.
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 */
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#ifndef _LINUX_RWSEM_H
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#error "please don't include asm/rwsem.h directly, use linux/rwsem.h instead"
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#endif
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#ifdef __KERNEL__
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#include <linux/list.h>
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#include <linux/spinlock.h>
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struct rwsem_waiter;
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extern struct rw_semaphore *rwsem_down_read_failed(struct rw_semaphore *);
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extern struct rw_semaphore *rwsem_down_write_failed(struct rw_semaphore *);
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extern struct rw_semaphore *rwsem_wake(struct rw_semaphore *);
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extern struct rw_semaphore *rwsem_downgrade_wake(struct rw_semaphore *);
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extern struct rw_semaphore *rwsem_downgrade_write(struct rw_semaphore *);
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/*
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 * the semaphore definition
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 */
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struct rw_semaphore {
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	signed long		count;
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	spinlock_t		wait_lock;
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	struct list_head	wait_list;
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#ifdef CONFIG_DEBUG_LOCK_ALLOC
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	struct lockdep_map	dep_map;
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#endif
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};
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#ifndef __s390x__
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#define RWSEM_UNLOCKED_VALUE	0x00000000
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#define RWSEM_ACTIVE_BIAS	0x00000001
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#define RWSEM_ACTIVE_MASK	0x0000ffff
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#define RWSEM_WAITING_BIAS	(-0x00010000)
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#else /* __s390x__ */
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#define RWSEM_UNLOCKED_VALUE	0x0000000000000000L
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#define RWSEM_ACTIVE_BIAS	0x0000000000000001L
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#define RWSEM_ACTIVE_MASK	0x00000000ffffffffL
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#define RWSEM_WAITING_BIAS	(-0x0000000100000000L)
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#endif /* __s390x__ */
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#define RWSEM_ACTIVE_READ_BIAS	RWSEM_ACTIVE_BIAS
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#define RWSEM_ACTIVE_WRITE_BIAS	(RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS)
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/*
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 * initialisation
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 */
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#ifdef CONFIG_DEBUG_LOCK_ALLOC
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# define __RWSEM_DEP_MAP_INIT(lockname) , .dep_map = { .name = #lockname }
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#else
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# define __RWSEM_DEP_MAP_INIT(lockname)
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#endif
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#define __RWSEM_INITIALIZER(name) \
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 { RWSEM_UNLOCKED_VALUE, __SPIN_LOCK_UNLOCKED((name).wait.lock), \
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   LIST_HEAD_INIT((name).wait_list) __RWSEM_DEP_MAP_INIT(name) }
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#define DECLARE_RWSEM(name) \
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	struct rw_semaphore name = __RWSEM_INITIALIZER(name)
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static inline void init_rwsem(struct rw_semaphore *sem)
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{
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	sem->count = RWSEM_UNLOCKED_VALUE;
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	spin_lock_init(&sem->wait_lock);
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	INIT_LIST_HEAD(&sem->wait_list);
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}
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extern void __init_rwsem(struct rw_semaphore *sem, const char *name,
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			 struct lock_class_key *key);
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#define init_rwsem(sem)				\
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do {						\
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	static struct lock_class_key __key;	\
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						\
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	__init_rwsem((sem), #sem, &__key);	\
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} while (0)
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/*
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 * lock for reading
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 */
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static inline void __down_read(struct rw_semaphore *sem)
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{
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	signed long old, new;
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	asm volatile(
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#ifndef __s390x__
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		"	l	%0,%2\n"
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		"0:	lr	%1,%0\n"
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		"	ahi	%1,%4\n"
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		"	cs	%0,%1,%2\n"
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		"	jl	0b"
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#else /* __s390x__ */
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		"	lg	%0,%2\n"
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		"0:	lgr	%1,%0\n"
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		"	aghi	%1,%4\n"
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		"	csg	%0,%1,%2\n"
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		"	jl	0b"
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#endif /* __s390x__ */
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		: "=&d" (old), "=&d" (new), "=Q" (sem->count)
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		: "Q" (sem->count), "i" (RWSEM_ACTIVE_READ_BIAS)
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		: "cc", "memory");
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	if (old < 0)
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		rwsem_down_read_failed(sem);
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}
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/*
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 * trylock for reading -- returns 1 if successful, 0 if contention
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 */
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static inline int __down_read_trylock(struct rw_semaphore *sem)
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{
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	signed long old, new;
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	asm volatile(
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#ifndef __s390x__
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		"	l	%0,%2\n"
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		"0:	ltr	%1,%0\n"
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		"	jm	1f\n"
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		"	ahi	%1,%4\n"
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		"	cs	%0,%1,%2\n"
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		"	jl	0b\n"
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		"1:"
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#else /* __s390x__ */
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		"	lg	%0,%2\n"
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		"0:	ltgr	%1,%0\n"
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		"	jm	1f\n"
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		"	aghi	%1,%4\n"
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		"	csg	%0,%1,%2\n"
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		"	jl	0b\n"
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		"1:"
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#endif /* __s390x__ */
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		: "=&d" (old), "=&d" (new), "=Q" (sem->count)
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		: "Q" (sem->count), "i" (RWSEM_ACTIVE_READ_BIAS)
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		: "cc", "memory");
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	return old >= 0 ? 1 : 0;
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}
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/*
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 * lock for writing
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 */
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static inline void __down_write_nested(struct rw_semaphore *sem, int subclass)
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{
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	signed long old, new, tmp;
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	tmp = RWSEM_ACTIVE_WRITE_BIAS;
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	asm volatile(
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#ifndef __s390x__
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		"	l	%0,%2\n"
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		"0:	lr	%1,%0\n"
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		"	a	%1,%4\n"
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		"	cs	%0,%1,%2\n"
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		"	jl	0b"
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#else /* __s390x__ */
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		"	lg	%0,%2\n"
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		"0:	lgr	%1,%0\n"
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		"	ag	%1,%4\n"
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		"	csg	%0,%1,%2\n"
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		"	jl	0b"
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#endif /* __s390x__ */
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		: "=&d" (old), "=&d" (new), "=Q" (sem->count)
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		: "Q" (sem->count), "m" (tmp)
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		: "cc", "memory");
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	if (old != 0)
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		rwsem_down_write_failed(sem);
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}
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static inline void __down_write(struct rw_semaphore *sem)
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{
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	__down_write_nested(sem, 0);
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}
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/*
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 * trylock for writing -- returns 1 if successful, 0 if contention
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 */
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static inline int __down_write_trylock(struct rw_semaphore *sem)
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{
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	signed long old;
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	asm volatile(
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#ifndef __s390x__
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		"	l	%0,%1\n"
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		"0:	ltr	%0,%0\n"
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		"	jnz	1f\n"
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		"	cs	%0,%3,%1\n"
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		"	jl	0b\n"
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#else /* __s390x__ */
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		"	lg	%0,%1\n"
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		"0:	ltgr	%0,%0\n"
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		"	jnz	1f\n"
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		"	csg	%0,%3,%1\n"
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		"	jl	0b\n"
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#endif /* __s390x__ */
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		"1:"
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		: "=&d" (old), "=Q" (sem->count)
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		: "Q" (sem->count), "d" (RWSEM_ACTIVE_WRITE_BIAS)
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		: "cc", "memory");
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	return (old == RWSEM_UNLOCKED_VALUE) ? 1 : 0;
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}
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/*
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 * unlock after reading
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 */
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static inline void __up_read(struct rw_semaphore *sem)
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{
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	signed long old, new;
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	asm volatile(
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#ifndef __s390x__
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		"	l	%0,%2\n"
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		"0:	lr	%1,%0\n"
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		"	ahi	%1,%4\n"
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		"	cs	%0,%1,%2\n"
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		"	jl	0b"
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#else /* __s390x__ */
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		"	lg	%0,%2\n"
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		"0:	lgr	%1,%0\n"
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		"	aghi	%1,%4\n"
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		"	csg	%0,%1,%2\n"
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		"	jl	0b"
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#endif /* __s390x__ */
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		: "=&d" (old), "=&d" (new), "=Q" (sem->count)
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		: "Q" (sem->count), "i" (-RWSEM_ACTIVE_READ_BIAS)
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		: "cc", "memory");
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	if (new < 0)
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		if ((new & RWSEM_ACTIVE_MASK) == 0)
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			rwsem_wake(sem);
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}
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/*
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 * unlock after writing
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 */
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static inline void __up_write(struct rw_semaphore *sem)
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{
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	signed long old, new, tmp;
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	tmp = -RWSEM_ACTIVE_WRITE_BIAS;
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	asm volatile(
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#ifndef __s390x__
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		"	l	%0,%2\n"
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		"0:	lr	%1,%0\n"
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		"	a	%1,%4\n"
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		"	cs	%0,%1,%2\n"
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		"	jl	0b"
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#else /* __s390x__ */
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		"	lg	%0,%2\n"
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		"0:	lgr	%1,%0\n"
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		"	ag	%1,%4\n"
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		"	csg	%0,%1,%2\n"
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		"	jl	0b"
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#endif /* __s390x__ */
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		: "=&d" (old), "=&d" (new), "=Q" (sem->count)
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		: "Q" (sem->count), "m" (tmp)
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		: "cc", "memory");
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	if (new < 0)
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		if ((new & RWSEM_ACTIVE_MASK) == 0)
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			rwsem_wake(sem);
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}
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/*
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 * downgrade write lock to read lock
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 */
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static inline void __downgrade_write(struct rw_semaphore *sem)
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{
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	signed long old, new, tmp;
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	tmp = -RWSEM_WAITING_BIAS;
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	asm volatile(
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#ifndef __s390x__
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		"	l	%0,%2\n"
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		"0:	lr	%1,%0\n"
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		"	a	%1,%4\n"
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		"	cs	%0,%1,%2\n"
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		"	jl	0b"
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#else /* __s390x__ */
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		"	lg	%0,%2\n"
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		"0:	lgr	%1,%0\n"
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		"	ag	%1,%4\n"
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		"	csg	%0,%1,%2\n"
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		"	jl	0b"
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#endif /* __s390x__ */
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		: "=&d" (old), "=&d" (new), "=Q" (sem->count)
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		: "Q" (sem->count), "m" (tmp)
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		: "cc", "memory");
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	if (new > 1)
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		rwsem_downgrade_wake(sem);
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}
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/*
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 * implement atomic add functionality
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 */
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static inline void rwsem_atomic_add(long delta, struct rw_semaphore *sem)
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{
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	signed long old, new;
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	asm volatile(
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#ifndef __s390x__
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		"	l	%0,%2\n"
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		"0:	lr	%1,%0\n"
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		"	ar	%1,%4\n"
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		"	cs	%0,%1,%2\n"
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		"	jl	0b"
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#else /* __s390x__ */
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		"	lg	%0,%2\n"
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		"0:	lgr	%1,%0\n"
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		"	agr	%1,%4\n"
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		"	csg	%0,%1,%2\n"
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		"	jl	0b"
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#endif /* __s390x__ */
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		: "=&d" (old), "=&d" (new), "=Q" (sem->count)
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		: "Q" (sem->count), "d" (delta)
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		: "cc", "memory");
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}
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/*
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 * implement exchange and add functionality
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 */
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static inline long rwsem_atomic_update(long delta, struct rw_semaphore *sem)
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{
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	signed long old, new;
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	asm volatile(
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#ifndef __s390x__
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		"	l	%0,%2\n"
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		"0:	lr	%1,%0\n"
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		"	ar	%1,%4\n"
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		"	cs	%0,%1,%2\n"
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		"	jl	0b"
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#else /* __s390x__ */
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		"	lg	%0,%2\n"
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		"0:	lgr	%1,%0\n"
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		"	agr	%1,%4\n"
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		"	csg	%0,%1,%2\n"
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		"	jl	0b"
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#endif /* __s390x__ */
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		: "=&d" (old), "=&d" (new), "=Q" (sem->count)
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		: "Q" (sem->count), "d" (delta)
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		: "cc", "memory");
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	return new;
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}
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static inline int rwsem_is_locked(struct rw_semaphore *sem)
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{
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	return (sem->count != 0);
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}
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#endif /* __KERNEL__ */
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#endif /* _S390_RWSEM_H */
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