 c7660994ed
			
		
	
	
	c7660994ed
	
	
	
		
			
			commit (sched: recover SD_WAKE_AFFINE in select_task_rq_fair and code clean up) removed SD_PREFER_LOCAL, but left a SD_PREFER_LOCAL usage in arch/tile code. That breaks the arch/tile build. Reported-by: Fengguang Wu <fengguang.wu@intel.com> Signed-off-by: Alex Shi <alex.shi@intel.com> Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/502AF3E6.3050709@intel.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
		
			
				
	
	
		
			97 lines
		
	
	
	
		
			2.8 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			97 lines
		
	
	
	
		
			2.8 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Copyright 2010 Tilera Corporation. All Rights Reserved.
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|  *
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|  *   This program is free software; you can redistribute it and/or
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|  *   modify it under the terms of the GNU General Public License
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|  *   as published by the Free Software Foundation, version 2.
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|  *
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|  *   This program is distributed in the hope that it will be useful, but
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|  *   WITHOUT ANY WARRANTY; without even the implied warranty of
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|  *   MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
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|  *   NON INFRINGEMENT.  See the GNU General Public License for
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|  *   more details.
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|  */
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| 
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| #ifndef _ASM_TILE_TOPOLOGY_H
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| #define _ASM_TILE_TOPOLOGY_H
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| 
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| #ifdef CONFIG_NUMA
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| 
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| #include <linux/cpumask.h>
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| 
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| /* Mappings between logical cpu number and node number. */
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| extern struct cpumask node_2_cpu_mask[];
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| extern char cpu_2_node[];
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| 
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| /* Returns the number of the node containing CPU 'cpu'. */
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| static inline int cpu_to_node(int cpu)
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| {
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| 	return cpu_2_node[cpu];
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| }
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| 
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| /*
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|  * Returns the number of the node containing Node 'node'.
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|  * This architecture is flat, so it is a pretty simple function!
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|  */
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| #define parent_node(node) (node)
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| 
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| /* Returns a bitmask of CPUs on Node 'node'. */
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| static inline const struct cpumask *cpumask_of_node(int node)
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| {
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| 	return &node_2_cpu_mask[node];
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| }
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| 
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| /* For now, use numa node -1 for global allocation. */
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| #define pcibus_to_node(bus)		((void)(bus), -1)
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| 
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| /*
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|  * TILE architecture has many cores integrated in one processor, so we need
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|  * setup bigger balance_interval for both CPU/NODE scheduling domains to
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|  * reduce process scheduling costs.
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|  */
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| 
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| /* sched_domains SD_CPU_INIT for TILE architecture */
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| #define SD_CPU_INIT (struct sched_domain) {				\
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| 	.min_interval		= 4,					\
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| 	.max_interval		= 128,					\
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| 	.busy_factor		= 64,					\
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| 	.imbalance_pct		= 125,					\
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| 	.cache_nice_tries	= 1,					\
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| 	.busy_idx		= 2,					\
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| 	.idle_idx		= 1,					\
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| 	.newidle_idx		= 0,					\
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| 	.wake_idx		= 0,					\
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| 	.forkexec_idx		= 0,					\
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| 									\
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| 	.flags			= 1*SD_LOAD_BALANCE			\
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| 				| 1*SD_BALANCE_NEWIDLE			\
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| 				| 1*SD_BALANCE_EXEC			\
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| 				| 1*SD_BALANCE_FORK			\
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| 				| 0*SD_BALANCE_WAKE			\
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| 				| 0*SD_WAKE_AFFINE			\
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| 				| 0*SD_SHARE_CPUPOWER			\
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| 				| 0*SD_SHARE_PKG_RESOURCES		\
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| 				| 0*SD_SERIALIZE			\
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| 				,					\
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| 	.last_balance		= jiffies,				\
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| 	.balance_interval	= 32,					\
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| }
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| 
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| /* By definition, we create nodes based on online memory. */
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| #define node_has_online_mem(nid) 1
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| 
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| #endif /* CONFIG_NUMA */
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| 
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| #include <asm-generic/topology.h>
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| 
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| #ifdef CONFIG_SMP
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| #define topology_physical_package_id(cpu)       ((void)(cpu), 0)
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| #define topology_core_id(cpu)                   (cpu)
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| #define topology_core_cpumask(cpu)              ((void)(cpu), cpu_online_mask)
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| #define topology_thread_cpumask(cpu)            cpumask_of(cpu)
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| 
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| /* indicates that pointers to the topology struct cpumask maps are valid */
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| #define arch_provides_topology_pointers         yes
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| #endif
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| 
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| #endif /* _ASM_TILE_TOPOLOGY_H */
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