d5d14ed6f2
This change introduces new flags for the hv_install_context() API that passes a page table pointer to the hypervisor. Clients can explicitly request 4K, 16K, or 64K small pages when they install a new context. In practice, the page size is fixed at kernel compile time and the same size is always requested every time a new page table is installed. The <hv/hypervisor.h> header changes so that it provides more abstract macros for managing "page" things like PFNs and page tables. For example there is now a HV_DEFAULT_PAGE_SIZE_SMALL instead of the old HV_PAGE_SIZE_SMALL. The various PFN routines have been eliminated and only PA- or PTFN-based ones remain (since PTFNs are always expressed in fixed 2KB "page" size). The page-table management macros are renamed with a leading underscore and take page-size arguments with the presumption that clients will use those macros in some single place to provide the "real" macros they will use themselves. I happened to notice the old hv_set_caching() API was totally broken (it assumed 4KB pages) so I changed it so it would nominally work correctly with other page sizes. Tag modules with the page size so you can't load a module built with a conflicting page size. (And add a test for SMP while we're at it.) Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
164 lines
4.8 KiB
C
164 lines
4.8 KiB
C
/*
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* Copyright 2010 Tilera Corporation. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, version 2.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
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* NON INFRINGEMENT. See the GNU General Public License for
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* more details.
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*/
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#ifndef _ASM_TILE_PGALLOC_H
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#define _ASM_TILE_PGALLOC_H
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#include <linux/threads.h>
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#include <linux/mm.h>
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#include <linux/mmzone.h>
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#include <asm/fixmap.h>
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#include <asm/page.h>
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#include <hv/hypervisor.h>
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/* Bits for the size of the second-level page table. */
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#define L2_KERNEL_PGTABLE_SHIFT _HV_LOG2_L2_SIZE(HPAGE_SHIFT, PAGE_SHIFT)
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/* How big is a kernel L2 page table? */
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#define L2_KERNEL_PGTABLE_SIZE (1UL << L2_KERNEL_PGTABLE_SHIFT)
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/* We currently allocate user L2 page tables by page (unlike kernel L2s). */
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#if L2_KERNEL_PGTABLE_SHIFT < PAGE_SHIFT
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#define L2_USER_PGTABLE_SHIFT PAGE_SHIFT
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#else
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#define L2_USER_PGTABLE_SHIFT L2_KERNEL_PGTABLE_SHIFT
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#endif
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/* How many pages do we need, as an "order", for a user L2 page table? */
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#define L2_USER_PGTABLE_ORDER (L2_USER_PGTABLE_SHIFT - PAGE_SHIFT)
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static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
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{
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#ifdef CONFIG_64BIT
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set_pte(pmdp, pmd);
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#else
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set_pte(&pmdp->pud.pgd, pmd.pud.pgd);
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#endif
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}
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static inline void pmd_populate_kernel(struct mm_struct *mm,
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pmd_t *pmd, pte_t *ptep)
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{
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set_pmd(pmd, ptfn_pmd(HV_CPA_TO_PTFN(__pa(ptep)),
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__pgprot(_PAGE_PRESENT)));
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}
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static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd,
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pgtable_t page)
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{
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set_pmd(pmd, ptfn_pmd(HV_CPA_TO_PTFN(PFN_PHYS(page_to_pfn(page))),
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__pgprot(_PAGE_PRESENT)));
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}
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/*
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* Allocate and free page tables.
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*/
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extern pgd_t *pgd_alloc(struct mm_struct *mm);
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extern void pgd_free(struct mm_struct *mm, pgd_t *pgd);
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extern pgtable_t pgtable_alloc_one(struct mm_struct *mm, unsigned long address,
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int order);
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extern void pgtable_free(struct mm_struct *mm, struct page *pte, int order);
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static inline pgtable_t pte_alloc_one(struct mm_struct *mm,
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unsigned long address)
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{
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return pgtable_alloc_one(mm, address, L2_USER_PGTABLE_ORDER);
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}
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static inline void pte_free(struct mm_struct *mm, struct page *pte)
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{
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pgtable_free(mm, pte, L2_USER_PGTABLE_ORDER);
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}
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#define pmd_pgtable(pmd) pmd_page(pmd)
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static inline pte_t *
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pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address)
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{
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return pfn_to_kaddr(page_to_pfn(pte_alloc_one(mm, address)));
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}
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static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
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{
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BUG_ON((unsigned long)pte & (PAGE_SIZE-1));
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pte_free(mm, virt_to_page(pte));
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}
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extern void __pgtable_free_tlb(struct mmu_gather *tlb, struct page *pte,
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unsigned long address, int order);
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static inline void __pte_free_tlb(struct mmu_gather *tlb, struct page *pte,
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unsigned long address)
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{
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__pgtable_free_tlb(tlb, pte, address, L2_USER_PGTABLE_ORDER);
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}
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#define check_pgt_cache() do { } while (0)
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/*
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* Get the small-page pte_t lowmem entry for a given pfn.
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* This may or may not be in use, depending on whether the initial
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* huge-page entry for the page has already been shattered.
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*/
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pte_t *get_prealloc_pte(unsigned long pfn);
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/* During init, we can shatter kernel huge pages if needed. */
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void shatter_pmd(pmd_t *pmd);
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/* After init, a more complex technique is required. */
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void shatter_huge_page(unsigned long addr);
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#ifdef __tilegx__
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#define pud_populate(mm, pud, pmd) \
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pmd_populate_kernel((mm), (pmd_t *)(pud), (pte_t *)(pmd))
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/* Bits for the size of the L1 (intermediate) page table. */
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#define L1_KERNEL_PGTABLE_SHIFT _HV_LOG2_L1_SIZE(HPAGE_SHIFT)
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/* How big is a kernel L2 page table? */
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#define L1_KERNEL_PGTABLE_SIZE (1UL << L1_KERNEL_PGTABLE_SHIFT)
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/* We currently allocate L1 page tables by page. */
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#if L1_KERNEL_PGTABLE_SHIFT < PAGE_SHIFT
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#define L1_USER_PGTABLE_SHIFT PAGE_SHIFT
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#else
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#define L1_USER_PGTABLE_SHIFT L1_KERNEL_PGTABLE_SHIFT
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#endif
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/* How many pages do we need, as an "order", for an L1 page table? */
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#define L1_USER_PGTABLE_ORDER (L1_USER_PGTABLE_SHIFT - PAGE_SHIFT)
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static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address)
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{
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struct page *p = pgtable_alloc_one(mm, address, L1_USER_PGTABLE_ORDER);
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return (pmd_t *)page_to_virt(p);
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}
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static inline void pmd_free(struct mm_struct *mm, pmd_t *pmdp)
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{
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pgtable_free(mm, virt_to_page(pmdp), L1_USER_PGTABLE_ORDER);
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}
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static inline void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmdp,
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unsigned long address)
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{
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__pgtable_free_tlb(tlb, virt_to_page(pmdp), address,
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L1_USER_PGTABLE_ORDER);
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}
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#endif /* __tilegx__ */
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#endif /* _ASM_TILE_PGALLOC_H */
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