 f03c4866d3
			
		
	
	
	f03c4866d3
	
	
	
		
			
			Quite a bit of fallout all over the place, nothing terribly exciting. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
		
			
				
	
	
		
			575 lines
		
	
	
	
		
			14 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			575 lines
		
	
	
	
		
			14 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Save/restore floating point context for signal handlers.
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|  *
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|  * Copyright (C) 1999, 2000  Kaz Kojima & Niibe Yutaka
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|  *
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|  * This file is subject to the terms and conditions of the GNU General Public
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|  * License.  See the file "COPYING" in the main directory of this archive
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|  * for more details.
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|  *
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|  * FIXME! These routines can be optimized in big endian case.
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|  */
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| #include <linux/sched.h>
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| #include <linux/signal.h>
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| #include <asm/processor.h>
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| #include <asm/io.h>
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| #include <asm/fpu.h>
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| #include <asm/traps.h>
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| 
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| /* The PR (precision) bit in the FP Status Register must be clear when
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|  * an frchg instruction is executed, otherwise the instruction is undefined.
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|  * Executing frchg with PR set causes a trap on some SH4 implementations.
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|  */
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| 
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| #define FPSCR_RCHG 0x00000000
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| 
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| 
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| /*
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|  * Save FPU registers onto task structure.
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|  */
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| void save_fpu(struct task_struct *tsk)
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| {
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| 	unsigned long dummy;
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| 
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| 	enable_fpu();
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| 	asm volatile("sts.l	fpul, @-%0\n\t"
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| 		     "sts.l	fpscr, @-%0\n\t"
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| 		     "fmov.s	fr15, @-%0\n\t"
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| 		     "fmov.s	fr14, @-%0\n\t"
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| 		     "fmov.s	fr13, @-%0\n\t"
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| 		     "fmov.s	fr12, @-%0\n\t"
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| 		     "fmov.s	fr11, @-%0\n\t"
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| 		     "fmov.s	fr10, @-%0\n\t"
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| 		     "fmov.s	fr9, @-%0\n\t"
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| 		     "fmov.s	fr8, @-%0\n\t"
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| 		     "fmov.s	fr7, @-%0\n\t"
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| 		     "fmov.s	fr6, @-%0\n\t"
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| 		     "fmov.s	fr5, @-%0\n\t"
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| 		     "fmov.s	fr4, @-%0\n\t"
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| 		     "fmov.s	fr3, @-%0\n\t"
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| 		     "fmov.s	fr2, @-%0\n\t"
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| 		     "fmov.s	fr1, @-%0\n\t"
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| 		     "fmov.s	fr0, @-%0\n\t"
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| 		     "lds	%3, fpscr\n\t"
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| 		     : "=r" (dummy)
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| 		     : "0" ((char *)(&tsk->thread.xstate->hardfpu.status)),
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| 		       "r" (FPSCR_RCHG),
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| 		       "r" (FPSCR_INIT)
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| 		     : "memory");
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| 
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| 	disable_fpu();
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| }
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| 
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| void restore_fpu(struct task_struct *tsk)
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| {
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| 	unsigned long dummy;
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| 
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| 	enable_fpu();
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| 	asm volatile("fmov.s	@%0+, fr0\n\t"
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| 		     "fmov.s	@%0+, fr1\n\t"
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| 		     "fmov.s	@%0+, fr2\n\t"
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| 		     "fmov.s	@%0+, fr3\n\t"
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| 		     "fmov.s	@%0+, fr4\n\t"
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| 		     "fmov.s	@%0+, fr5\n\t"
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| 		     "fmov.s	@%0+, fr6\n\t"
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| 		     "fmov.s	@%0+, fr7\n\t"
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| 		     "fmov.s	@%0+, fr8\n\t"
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| 		     "fmov.s	@%0+, fr9\n\t"
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| 		     "fmov.s	@%0+, fr10\n\t"
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| 		     "fmov.s	@%0+, fr11\n\t"
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| 		     "fmov.s	@%0+, fr12\n\t"
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| 		     "fmov.s	@%0+, fr13\n\t"
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| 		     "fmov.s	@%0+, fr14\n\t"
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| 		     "fmov.s	@%0+, fr15\n\t"
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| 		     "lds.l	@%0+, fpscr\n\t"
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| 		     "lds.l	@%0+, fpul\n\t"
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| 		     : "=r" (dummy)
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| 		     : "0" (tsk->thread.xstate), "r" (FPSCR_RCHG)
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| 		     : "memory");
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| 	disable_fpu();
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| }
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| 
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| /*
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|  *	Emulate arithmetic ops on denormalized number for some FPU insns.
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|  */
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| 
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| /* denormalized float * float */
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| static int denormal_mulf(int hx, int hy)
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| {
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| 	unsigned int ix, iy;
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| 	unsigned long long m, n;
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| 	int exp, w;
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| 
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| 	ix = hx & 0x7fffffff;
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| 	iy = hy & 0x7fffffff;
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| 	if (iy < 0x00800000 || ix == 0)
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| 		return ((hx ^ hy) & 0x80000000);
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| 
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| 	exp = (iy & 0x7f800000) >> 23;
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| 	ix &= 0x007fffff;
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| 	iy = (iy & 0x007fffff) | 0x00800000;
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| 	m = (unsigned long long)ix * iy;
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| 	n = m;
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| 	w = -1;
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| 	while (n) { n >>= 1; w++; }
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| 
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| 	/* FIXME: use guard bits */
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| 	exp += w - 126 - 46;
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| 	if (exp > 0)
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| 		ix = ((int) (m >> (w - 23)) & 0x007fffff) | (exp << 23);
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| 	else if (exp + 22 >= 0)
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| 		ix = (int) (m >> (w - 22 - exp)) & 0x007fffff;
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| 	else
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| 		ix = 0;
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| 
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| 	ix |= (hx ^ hy) & 0x80000000;
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| 	return ix;
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| }
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| 
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| /* denormalized double * double */
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| static void mult64(unsigned long long x, unsigned long long y,
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| 		unsigned long long *highp, unsigned long long *lowp)
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| {
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| 	unsigned long long sub0, sub1, sub2, sub3;
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| 	unsigned long long high, low;
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| 
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| 	sub0 = (x >> 32) * (unsigned long) (y >> 32);
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| 	sub1 = (x & 0xffffffffLL) * (unsigned long) (y >> 32);
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| 	sub2 = (x >> 32) * (unsigned long) (y & 0xffffffffLL);
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| 	sub3 = (x & 0xffffffffLL) * (unsigned long) (y & 0xffffffffLL);
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| 	low = sub3;
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| 	high = 0LL;
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| 	sub3 += (sub1 << 32);
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| 	if (low > sub3)
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| 		high++;
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| 	low = sub3;
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| 	sub3 += (sub2 << 32);
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| 	if (low > sub3)
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| 		high++;
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| 	low = sub3;
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| 	high += (sub1 >> 32) + (sub2 >> 32);
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| 	high += sub0;
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| 	*lowp = low;
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| 	*highp = high;
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| }
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| 
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| static inline long long rshift64(unsigned long long mh,
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| 		unsigned long long ml, int n)
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| {
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| 	if (n >= 64)
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| 		return mh >> (n - 64);
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| 	return (mh << (64 - n)) | (ml >> n);
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| }
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| 
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| static long long denormal_muld(long long hx, long long hy)
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| {
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| 	unsigned long long ix, iy;
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| 	unsigned long long mh, ml, nh, nl;
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| 	int exp, w;
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| 
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| 	ix = hx & 0x7fffffffffffffffLL;
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| 	iy = hy & 0x7fffffffffffffffLL;
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| 	if (iy < 0x0010000000000000LL || ix == 0)
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| 		return ((hx ^ hy) & 0x8000000000000000LL);
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| 
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| 	exp = (iy & 0x7ff0000000000000LL) >> 52;
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| 	ix &= 0x000fffffffffffffLL;
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| 	iy = (iy & 0x000fffffffffffffLL) | 0x0010000000000000LL;
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| 	mult64(ix, iy, &mh, &ml);
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| 	nh = mh;
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| 	nl = ml;
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| 	w = -1;
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| 	if (nh) {
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| 		while (nh) { nh >>= 1; w++;}
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| 		w += 64;
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| 	} else
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| 		while (nl) { nl >>= 1; w++;}
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| 
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| 	/* FIXME: use guard bits */
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| 	exp += w - 1022 - 52 * 2;
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| 	if (exp > 0)
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| 		ix = (rshift64(mh, ml, w - 52) & 0x000fffffffffffffLL)
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| 			| ((long long)exp << 52);
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| 	else if (exp + 51 >= 0)
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| 		ix = rshift64(mh, ml, w - 51 - exp) & 0x000fffffffffffffLL;
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| 	else
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| 		ix = 0;
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| 
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| 	ix |= (hx ^ hy) & 0x8000000000000000LL;
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| 	return ix;
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| }
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| 
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| /* ix - iy where iy: denormal and ix, iy >= 0 */
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| static int denormal_subf1(unsigned int ix, unsigned int iy)
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| {
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| 	int frac;
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| 	int exp;
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| 
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| 	if (ix < 0x00800000)
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| 		return ix - iy;
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| 
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| 	exp = (ix & 0x7f800000) >> 23;
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| 	if (exp - 1 > 31)
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| 		return ix;
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| 	iy >>= exp - 1;
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| 	if (iy == 0)
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| 		return ix;
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| 
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| 	frac = (ix & 0x007fffff) | 0x00800000;
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| 	frac -= iy;
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| 	while (frac < 0x00800000) {
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| 		if (--exp == 0)
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| 			return frac;
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| 		frac <<= 1;
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| 	}
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| 
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| 	return (exp << 23) | (frac & 0x007fffff);
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| }
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| 
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| /* ix + iy where iy: denormal and ix, iy >= 0 */
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| static int denormal_addf1(unsigned int ix, unsigned int iy)
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| {
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| 	int frac;
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| 	int exp;
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| 
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| 	if (ix < 0x00800000)
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| 		return ix + iy;
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| 
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| 	exp = (ix & 0x7f800000) >> 23;
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| 	if (exp - 1 > 31)
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| 		return ix;
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| 	iy >>= exp - 1;
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| 	if (iy == 0)
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| 	  return ix;
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| 
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| 	frac = (ix & 0x007fffff) | 0x00800000;
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| 	frac += iy;
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| 	if (frac >= 0x01000000) {
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| 		frac >>= 1;
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| 		++exp;
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| 	}
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| 
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| 	return (exp << 23) | (frac & 0x007fffff);
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| }
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| 
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| static int denormal_addf(int hx, int hy)
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| {
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| 	unsigned int ix, iy;
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| 	int sign;
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| 
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| 	if ((hx ^ hy) & 0x80000000) {
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| 		sign = hx & 0x80000000;
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| 		ix = hx & 0x7fffffff;
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| 		iy = hy & 0x7fffffff;
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| 		if (iy < 0x00800000) {
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| 			ix = denormal_subf1(ix, iy);
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| 			if ((int) ix < 0) {
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| 				ix = -ix;
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| 				sign ^= 0x80000000;
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| 			}
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| 		} else {
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| 			ix = denormal_subf1(iy, ix);
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| 			sign ^= 0x80000000;
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| 		}
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| 	} else {
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| 		sign = hx & 0x80000000;
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| 		ix = hx & 0x7fffffff;
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| 		iy = hy & 0x7fffffff;
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| 		if (iy < 0x00800000)
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| 			ix = denormal_addf1(ix, iy);
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| 		else
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| 			ix = denormal_addf1(iy, ix);
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| 	}
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| 
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| 	return sign | ix;
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| }
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| 
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| /* ix - iy where iy: denormal and ix, iy >= 0 */
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| static long long denormal_subd1(unsigned long long ix, unsigned long long iy)
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| {
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| 	long long frac;
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| 	int exp;
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| 
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| 	if (ix < 0x0010000000000000LL)
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| 		return ix - iy;
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| 
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| 	exp = (ix & 0x7ff0000000000000LL) >> 52;
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| 	if (exp - 1 > 63)
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| 		return ix;
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| 	iy >>= exp - 1;
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| 	if (iy == 0)
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| 		return ix;
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| 
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| 	frac = (ix & 0x000fffffffffffffLL) | 0x0010000000000000LL;
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| 	frac -= iy;
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| 	while (frac < 0x0010000000000000LL) {
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| 		if (--exp == 0)
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| 			return frac;
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| 		frac <<= 1;
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| 	}
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| 
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| 	return ((long long)exp << 52) | (frac & 0x000fffffffffffffLL);
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| }
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| 
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| /* ix + iy where iy: denormal and ix, iy >= 0 */
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| static long long denormal_addd1(unsigned long long ix, unsigned long long iy)
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| {
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| 	long long frac;
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| 	long long exp;
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| 
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| 	if (ix < 0x0010000000000000LL)
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| 		return ix + iy;
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| 
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| 	exp = (ix & 0x7ff0000000000000LL) >> 52;
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| 	if (exp - 1 > 63)
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| 		return ix;
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| 	iy >>= exp - 1;
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| 	if (iy == 0)
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| 	  return ix;
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| 
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| 	frac = (ix & 0x000fffffffffffffLL) | 0x0010000000000000LL;
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| 	frac += iy;
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| 	if (frac >= 0x0020000000000000LL) {
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| 		frac >>= 1;
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| 		++exp;
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| 	}
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| 
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| 	return (exp << 52) | (frac & 0x000fffffffffffffLL);
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| }
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| 
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| static long long denormal_addd(long long hx, long long hy)
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| {
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| 	unsigned long long ix, iy;
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| 	long long sign;
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| 
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| 	if ((hx ^ hy) & 0x8000000000000000LL) {
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| 		sign = hx & 0x8000000000000000LL;
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| 		ix = hx & 0x7fffffffffffffffLL;
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| 		iy = hy & 0x7fffffffffffffffLL;
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| 		if (iy < 0x0010000000000000LL) {
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| 			ix = denormal_subd1(ix, iy);
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| 			if ((int) ix < 0) {
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| 				ix = -ix;
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| 				sign ^= 0x8000000000000000LL;
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| 			}
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| 		} else {
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| 			ix = denormal_subd1(iy, ix);
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| 			sign ^= 0x8000000000000000LL;
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| 		}
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| 	} else {
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| 		sign = hx & 0x8000000000000000LL;
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| 		ix = hx & 0x7fffffffffffffffLL;
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| 		iy = hy & 0x7fffffffffffffffLL;
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| 		if (iy < 0x0010000000000000LL)
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| 			ix = denormal_addd1(ix, iy);
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| 		else
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| 			ix = denormal_addd1(iy, ix);
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| 	}
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| 
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| 	return sign | ix;
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| }
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| 
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| /**
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|  *	denormal_to_double - Given denormalized float number,
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|  *	                     store double float
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|  *
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|  *	@fpu: Pointer to sh_fpu_hard structure
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|  *	@n: Index to FP register
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|  */
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| static void
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| denormal_to_double (struct sh_fpu_hard_struct *fpu, int n)
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| {
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| 	unsigned long du, dl;
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| 	unsigned long x = fpu->fpul;
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| 	int exp = 1023 - 126;
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| 
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| 	if (x != 0 && (x & 0x7f800000) == 0) {
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| 		du = (x & 0x80000000);
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| 		while ((x & 0x00800000) == 0) {
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| 			x <<= 1;
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| 			exp--;
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| 		}
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| 		x &= 0x007fffff;
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| 		du |= (exp << 20) | (x >> 3);
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| 		dl = x << 29;
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| 
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| 		fpu->fp_regs[n] = du;
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| 		fpu->fp_regs[n+1] = dl;
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| 	}
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| }
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| 
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| /**
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|  *	ieee_fpe_handler - Handle denormalized number exception
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|  *
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|  *	@regs: Pointer to register structure
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|  *
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|  *	Returns 1 when it's handled (should not cause exception).
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|  */
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| static int
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| ieee_fpe_handler (struct pt_regs *regs)
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| {
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| 	unsigned short insn = *(unsigned short *) regs->pc;
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| 	unsigned short finsn;
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| 	unsigned long nextpc;
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| 	int nib[4] = {
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| 		(insn >> 12) & 0xf,
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| 		(insn >> 8) & 0xf,
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| 		(insn >> 4) & 0xf,
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| 		insn & 0xf};
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| 
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| 	if (nib[0] == 0xb ||
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| 	    (nib[0] == 0x4 && nib[2] == 0x0 && nib[3] == 0xb)) /* bsr & jsr */
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| 		regs->pr = regs->pc + 4;
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| 	if (nib[0] == 0xa || nib[0] == 0xb) { /* bra & bsr */
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| 		nextpc = regs->pc + 4 + ((short) ((insn & 0xfff) << 4) >> 3);
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| 		finsn = *(unsigned short *) (regs->pc + 2);
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| 	} else if (nib[0] == 0x8 && nib[1] == 0xd) { /* bt/s */
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| 		if (regs->sr & 1)
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| 			nextpc = regs->pc + 4 + ((char) (insn & 0xff) << 1);
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| 		else
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| 			nextpc = regs->pc + 4;
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| 		finsn = *(unsigned short *) (regs->pc + 2);
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| 	} else if (nib[0] == 0x8 && nib[1] == 0xf) { /* bf/s */
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| 		if (regs->sr & 1)
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| 			nextpc = regs->pc + 4;
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| 		else
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| 			nextpc = regs->pc + 4 + ((char) (insn & 0xff) << 1);
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| 		finsn = *(unsigned short *) (regs->pc + 2);
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| 	} else if (nib[0] == 0x4 && nib[3] == 0xb &&
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| 		 (nib[2] == 0x0 || nib[2] == 0x2)) { /* jmp & jsr */
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| 		nextpc = regs->regs[nib[1]];
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| 		finsn = *(unsigned short *) (regs->pc + 2);
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| 	} else if (nib[0] == 0x0 && nib[3] == 0x3 &&
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| 		 (nib[2] == 0x0 || nib[2] == 0x2)) { /* braf & bsrf */
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| 		nextpc = regs->pc + 4 + regs->regs[nib[1]];
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| 		finsn = *(unsigned short *) (regs->pc + 2);
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| 	} else if (insn == 0x000b) { /* rts */
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| 		nextpc = regs->pr;
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| 		finsn = *(unsigned short *) (regs->pc + 2);
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| 	} else {
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| 		nextpc = regs->pc + 2;
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| 		finsn = insn;
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| 	}
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| 
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| #define FPSCR_FPU_ERROR (1 << 17)
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| 
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| 	if ((finsn & 0xf1ff) == 0xf0ad) { /* fcnvsd */
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| 		struct task_struct *tsk = current;
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| 
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| 		if ((tsk->thread.xstate->hardfpu.fpscr & FPSCR_FPU_ERROR)) {
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| 			/* FPU error */
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| 			denormal_to_double (&tsk->thread.xstate->hardfpu,
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| 					    (finsn >> 8) & 0xf);
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| 		} else
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| 			return 0;
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| 
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| 		regs->pc = nextpc;
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| 		return 1;
 | |
| 	} else if ((finsn & 0xf00f) == 0xf002) { /* fmul */
 | |
| 		struct task_struct *tsk = current;
 | |
| 		int fpscr;
 | |
| 		int n, m, prec;
 | |
| 		unsigned int hx, hy;
 | |
| 
 | |
| 		n = (finsn >> 8) & 0xf;
 | |
| 		m = (finsn >> 4) & 0xf;
 | |
| 		hx = tsk->thread.xstate->hardfpu.fp_regs[n];
 | |
| 		hy = tsk->thread.xstate->hardfpu.fp_regs[m];
 | |
| 		fpscr = tsk->thread.xstate->hardfpu.fpscr;
 | |
| 		prec = fpscr & (1 << 19);
 | |
| 
 | |
| 		if ((fpscr & FPSCR_FPU_ERROR)
 | |
| 		     && (prec && ((hx & 0x7fffffff) < 0x00100000
 | |
| 				   || (hy & 0x7fffffff) < 0x00100000))) {
 | |
| 			long long llx, lly;
 | |
| 
 | |
| 			/* FPU error because of denormal */
 | |
| 			llx = ((long long) hx << 32)
 | |
| 			       | tsk->thread.xstate->hardfpu.fp_regs[n+1];
 | |
| 			lly = ((long long) hy << 32)
 | |
| 			       | tsk->thread.xstate->hardfpu.fp_regs[m+1];
 | |
| 			if ((hx & 0x7fffffff) >= 0x00100000)
 | |
| 				llx = denormal_muld(lly, llx);
 | |
| 			else
 | |
| 				llx = denormal_muld(llx, lly);
 | |
| 			tsk->thread.xstate->hardfpu.fp_regs[n] = llx >> 32;
 | |
| 			tsk->thread.xstate->hardfpu.fp_regs[n+1] = llx & 0xffffffff;
 | |
| 		} else if ((fpscr & FPSCR_FPU_ERROR)
 | |
| 		     && (!prec && ((hx & 0x7fffffff) < 0x00800000
 | |
| 				   || (hy & 0x7fffffff) < 0x00800000))) {
 | |
| 			/* FPU error because of denormal */
 | |
| 			if ((hx & 0x7fffffff) >= 0x00800000)
 | |
| 				hx = denormal_mulf(hy, hx);
 | |
| 			else
 | |
| 				hx = denormal_mulf(hx, hy);
 | |
| 			tsk->thread.xstate->hardfpu.fp_regs[n] = hx;
 | |
| 		} else
 | |
| 			return 0;
 | |
| 
 | |
| 		regs->pc = nextpc;
 | |
| 		return 1;
 | |
| 	} else if ((finsn & 0xf00e) == 0xf000) { /* fadd, fsub */
 | |
| 		struct task_struct *tsk = current;
 | |
| 		int fpscr;
 | |
| 		int n, m, prec;
 | |
| 		unsigned int hx, hy;
 | |
| 
 | |
| 		n = (finsn >> 8) & 0xf;
 | |
| 		m = (finsn >> 4) & 0xf;
 | |
| 		hx = tsk->thread.xstate->hardfpu.fp_regs[n];
 | |
| 		hy = tsk->thread.xstate->hardfpu.fp_regs[m];
 | |
| 		fpscr = tsk->thread.xstate->hardfpu.fpscr;
 | |
| 		prec = fpscr & (1 << 19);
 | |
| 
 | |
| 		if ((fpscr & FPSCR_FPU_ERROR)
 | |
| 		     && (prec && ((hx & 0x7fffffff) < 0x00100000
 | |
| 				   || (hy & 0x7fffffff) < 0x00100000))) {
 | |
| 			long long llx, lly;
 | |
| 
 | |
| 			/* FPU error because of denormal */
 | |
| 			llx = ((long long) hx << 32)
 | |
| 			       | tsk->thread.xstate->hardfpu.fp_regs[n+1];
 | |
| 			lly = ((long long) hy << 32)
 | |
| 			       | tsk->thread.xstate->hardfpu.fp_regs[m+1];
 | |
| 			if ((finsn & 0xf00f) == 0xf000)
 | |
| 				llx = denormal_addd(llx, lly);
 | |
| 			else
 | |
| 				llx = denormal_addd(llx, lly ^ (1LL << 63));
 | |
| 			tsk->thread.xstate->hardfpu.fp_regs[n] = llx >> 32;
 | |
| 			tsk->thread.xstate->hardfpu.fp_regs[n+1] = llx & 0xffffffff;
 | |
| 		} else if ((fpscr & FPSCR_FPU_ERROR)
 | |
| 		     && (!prec && ((hx & 0x7fffffff) < 0x00800000
 | |
| 				   || (hy & 0x7fffffff) < 0x00800000))) {
 | |
| 			/* FPU error because of denormal */
 | |
| 			if ((finsn & 0xf00f) == 0xf000)
 | |
| 				hx = denormal_addf(hx, hy);
 | |
| 			else
 | |
| 				hx = denormal_addf(hx, hy ^ 0x80000000);
 | |
| 			tsk->thread.xstate->hardfpu.fp_regs[n] = hx;
 | |
| 		} else
 | |
| 			return 0;
 | |
| 
 | |
| 		regs->pc = nextpc;
 | |
| 		return 1;
 | |
| 	}
 | |
| 
 | |
| 	return 0;
 | |
| }
 | |
| 
 | |
| BUILD_TRAP_HANDLER(fpu_error)
 | |
| {
 | |
| 	struct task_struct *tsk = current;
 | |
| 	TRAP_HANDLER_DECL;
 | |
| 
 | |
| 	__unlazy_fpu(tsk, regs);
 | |
| 	if (ieee_fpe_handler(regs)) {
 | |
| 		tsk->thread.xstate->hardfpu.fpscr &=
 | |
| 			~(FPSCR_CAUSE_MASK | FPSCR_FLAG_MASK);
 | |
| 		grab_fpu(regs);
 | |
| 		restore_fpu(tsk);
 | |
| 		task_thread_info(tsk)->status |= TS_USEDFPU;
 | |
| 		return;
 | |
| 	}
 | |
| 
 | |
| 	force_sig(SIGFPE, tsk);
 | |
| }
 |