 4ad2c06155
			
		
	
	
	4ad2c06155
	
	
	
		
			
			Convert sh2a SoCs to use sh_clk_ops. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
		
			
				
	
	
		
			85 lines
		
	
	
	
		
			2 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			85 lines
		
	
	
	
		
			2 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * arch/sh/kernel/cpu/sh2a/clock-sh7201.c
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|  *
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|  * SH7201 support for the clock framework
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|  *
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|  *  Copyright (C) 2008 Peter Griffin  <pgriffin@mpc-data.co.uk>
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|  *
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|  * Based on clock-sh4.c
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|  *  Copyright (C) 2005  Paul Mundt
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|  *
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|  * This file is subject to the terms and conditions of the GNU General Public
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|  * License.  See the file "COPYING" in the main directory of this archive
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|  * for more details.
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|  */
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| #include <linux/init.h>
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| #include <linux/kernel.h>
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| #include <asm/clock.h>
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| #include <asm/freq.h>
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| #include <asm/io.h>
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| 
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| static const int pll1rate[]={1,2,3,4,6,8};
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| static const int pfc_divisors[]={1,2,3,4,6,8,12};
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| #define ifc_divisors pfc_divisors
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| 
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| static unsigned int pll2_mult;
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| 
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| static void master_clk_init(struct clk *clk)
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| {
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| 	clk->rate = 10000000 * pll2_mult *
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| 	       pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007];
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| }
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| 
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| static struct sh_clk_ops sh7201_master_clk_ops = {
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| 	.init		= master_clk_init,
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| };
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| 
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| static unsigned long module_clk_recalc(struct clk *clk)
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| {
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| 	int idx = (__raw_readw(FREQCR) & 0x0007);
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| 	return clk->parent->rate / pfc_divisors[idx];
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| }
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| 
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| static struct sh_clk_ops sh7201_module_clk_ops = {
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| 	.recalc		= module_clk_recalc,
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| };
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| 
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| static unsigned long bus_clk_recalc(struct clk *clk)
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| {
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| 	int idx = (__raw_readw(FREQCR) & 0x0007);
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| 	return clk->parent->rate / pfc_divisors[idx];
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| }
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| 
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| static struct sh_clk_ops sh7201_bus_clk_ops = {
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| 	.recalc		= bus_clk_recalc,
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| };
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| 
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| static unsigned long cpu_clk_recalc(struct clk *clk)
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| {
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| 	int idx = ((__raw_readw(FREQCR) >> 4) & 0x0007);
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| 	return clk->parent->rate / ifc_divisors[idx];
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| }
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| 
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| static struct sh_clk_ops sh7201_cpu_clk_ops = {
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| 	.recalc		= cpu_clk_recalc,
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| };
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| 
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| static struct sh_clk_ops *sh7201_clk_ops[] = {
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| 	&sh7201_master_clk_ops,
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| 	&sh7201_module_clk_ops,
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| 	&sh7201_bus_clk_ops,
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| 	&sh7201_cpu_clk_ops,
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| };
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| 
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| void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx)
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| {
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| 	if (test_mode_pin(MODE_PIN1 | MODE_PIN0))
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| 		pll2_mult = 1;
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| 	else if (test_mode_pin(MODE_PIN1))
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| 		pll2_mult = 2;
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| 	else
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| 		pll2_mult = 4;
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| 
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| 	if (idx < ARRAY_SIZE(sh7201_clk_ops))
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| 		*ops = sh7201_clk_ops[idx];
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| }
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