7120569c76
This patch removes the following warnings and related ones. Plus some cosmetics. arch/ia64/kernel/patch.c:112: warning: passing argument 1 of 'paravirt_fc' makes integer from pointer without a cast arch/ia64/kernel/patch.c:135: warning: passing argument 1 of 'paravirt_fc' makes integer from pointer without a cast arch/ia64/kernel/patch.c:166: warning: passing argument 1 of 'paravirt_fc' makes integer from pointer without a cast arch/ia64/kernel/patch.c:202: warning: passing argument 1 of 'paravirt_fc' makes integer from pointer without a cast arch/ia64/kernel/patch.c:220: warning: passing argument 1 of 'paravirt_fc' makes integer from pointer without a cast Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Tony Luck <tony.luck@intel.com>
135 lines
5.3 KiB
C
135 lines
5.3 KiB
C
#ifndef _ASM_IA64_XEN_PRIVOP_H
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#define _ASM_IA64_XEN_PRIVOP_H
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/*
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* Copyright (C) 2005 Hewlett-Packard Co
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* Dan Magenheimer <dan.magenheimer@hp.com>
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*
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* Paravirtualizations of privileged operations for Xen/ia64
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*
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*
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* inline privop and paravirt_alt support
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* Copyright (c) 2007 Isaku Yamahata <yamahata at valinux co jp>
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* VA Linux Systems Japan K.K.
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*
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*/
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#ifndef __ASSEMBLY__
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#include <linux/types.h> /* arch-ia64.h requires uint64_t */
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#endif
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#include <asm/xen/interface.h>
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/* At 1 MB, before per-cpu space but still addressable using addl instead
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of movl. */
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#define XSI_BASE 0xfffffffffff00000
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/* Address of mapped regs. */
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#define XMAPPEDREGS_BASE (XSI_BASE + XSI_SIZE)
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#ifdef __ASSEMBLY__
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#define XEN_HYPER_RFI break HYPERPRIVOP_RFI
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#define XEN_HYPER_RSM_PSR_DT break HYPERPRIVOP_RSM_DT
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#define XEN_HYPER_SSM_PSR_DT break HYPERPRIVOP_SSM_DT
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#define XEN_HYPER_COVER break HYPERPRIVOP_COVER
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#define XEN_HYPER_ITC_D break HYPERPRIVOP_ITC_D
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#define XEN_HYPER_ITC_I break HYPERPRIVOP_ITC_I
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#define XEN_HYPER_SSM_I break HYPERPRIVOP_SSM_I
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#define XEN_HYPER_GET_IVR break HYPERPRIVOP_GET_IVR
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#define XEN_HYPER_THASH break HYPERPRIVOP_THASH
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#define XEN_HYPER_ITR_D break HYPERPRIVOP_ITR_D
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#define XEN_HYPER_SET_KR break HYPERPRIVOP_SET_KR
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#define XEN_HYPER_GET_PSR break HYPERPRIVOP_GET_PSR
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#define XEN_HYPER_SET_RR0_TO_RR4 break HYPERPRIVOP_SET_RR0_TO_RR4
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#define XSI_IFS (XSI_BASE + XSI_IFS_OFS)
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#define XSI_PRECOVER_IFS (XSI_BASE + XSI_PRECOVER_IFS_OFS)
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#define XSI_IFA (XSI_BASE + XSI_IFA_OFS)
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#define XSI_ISR (XSI_BASE + XSI_ISR_OFS)
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#define XSI_IIM (XSI_BASE + XSI_IIM_OFS)
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#define XSI_ITIR (XSI_BASE + XSI_ITIR_OFS)
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#define XSI_PSR_I_ADDR (XSI_BASE + XSI_PSR_I_ADDR_OFS)
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#define XSI_PSR_IC (XSI_BASE + XSI_PSR_IC_OFS)
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#define XSI_IPSR (XSI_BASE + XSI_IPSR_OFS)
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#define XSI_IIP (XSI_BASE + XSI_IIP_OFS)
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#define XSI_B1NAT (XSI_BASE + XSI_B1NATS_OFS)
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#define XSI_BANK1_R16 (XSI_BASE + XSI_BANK1_R16_OFS)
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#define XSI_BANKNUM (XSI_BASE + XSI_BANKNUM_OFS)
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#define XSI_IHA (XSI_BASE + XSI_IHA_OFS)
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#define XSI_ITC_OFFSET (XSI_BASE + XSI_ITC_OFFSET_OFS)
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#define XSI_ITC_LAST (XSI_BASE + XSI_ITC_LAST_OFS)
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#endif
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#ifndef __ASSEMBLY__
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/************************************************/
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/* Instructions paravirtualized for correctness */
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/************************************************/
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/* "fc" and "thash" are privilege-sensitive instructions, meaning they
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* may have different semantics depending on whether they are executed
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* at PL0 vs PL!=0. When paravirtualized, these instructions mustn't
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* be allowed to execute directly, lest incorrect semantics result. */
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extern void xen_fc(void *addr);
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extern unsigned long xen_thash(unsigned long addr);
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/* Note that "ttag" and "cover" are also privilege-sensitive; "ttag"
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* is not currently used (though it may be in a long-format VHPT system!)
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* and the semantics of cover only change if psr.ic is off which is very
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* rare (and currently non-existent outside of assembly code */
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/* There are also privilege-sensitive registers. These registers are
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* readable at any privilege level but only writable at PL0. */
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extern unsigned long xen_get_cpuid(int index);
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extern unsigned long xen_get_pmd(int index);
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#ifndef ASM_SUPPORTED
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extern unsigned long xen_get_eflag(void); /* see xen_ia64_getreg */
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extern void xen_set_eflag(unsigned long); /* see xen_ia64_setreg */
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#endif
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/************************************************/
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/* Instructions paravirtualized for performance */
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/************************************************/
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/* Xen uses memory-mapped virtual privileged registers for access to many
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* performance-sensitive privileged registers. Some, like the processor
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* status register (psr), are broken up into multiple memory locations.
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* Others, like "pend", are abstractions based on privileged registers.
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* "Pend" is guaranteed to be set if reading cr.ivr would return a
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* (non-spurious) interrupt. */
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#define XEN_MAPPEDREGS ((struct mapped_regs *)XMAPPEDREGS_BASE)
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#define XSI_PSR_I \
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(*XEN_MAPPEDREGS->interrupt_mask_addr)
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#define xen_get_virtual_psr_i() \
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(!XSI_PSR_I)
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#define xen_set_virtual_psr_i(_val) \
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({ XSI_PSR_I = (uint8_t)(_val) ? 0 : 1; })
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#define xen_set_virtual_psr_ic(_val) \
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({ XEN_MAPPEDREGS->interrupt_collection_enabled = _val ? 1 : 0; })
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#define xen_get_virtual_pend() \
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(*(((uint8_t *)XEN_MAPPEDREGS->interrupt_mask_addr) - 1))
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#ifndef ASM_SUPPORTED
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/* Although all privileged operations can be left to trap and will
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* be properly handled by Xen, some are frequent enough that we use
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* hyperprivops for performance. */
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extern unsigned long xen_get_psr(void);
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extern unsigned long xen_get_ivr(void);
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extern unsigned long xen_get_tpr(void);
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extern void xen_hyper_ssm_i(void);
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extern void xen_set_itm(unsigned long);
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extern void xen_set_tpr(unsigned long);
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extern void xen_eoi(unsigned long);
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extern unsigned long xen_get_rr(unsigned long index);
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extern void xen_set_rr(unsigned long index, unsigned long val);
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extern void xen_set_rr0_to_rr4(unsigned long val0, unsigned long val1,
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unsigned long val2, unsigned long val3,
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unsigned long val4);
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extern void xen_set_kr(unsigned long index, unsigned long val);
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extern void xen_ptcga(unsigned long addr, unsigned long size);
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#endif /* !ASM_SUPPORTED */
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#endif /* !__ASSEMBLY__ */
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#endif /* _ASM_IA64_XEN_PRIVOP_H */
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