1058ce2084
[akpm@linux-foundation.org: checkpatch fixes] Signed-off-by: Andi Kleen <ak@linux.intel.com> Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
104 lines
3.1 KiB
C
104 lines
3.1 KiB
C
/*
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* linux/arch/h8300/platform/h8s/ints_h8s.c
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* Interrupt handling CPU variants
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*
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* Yoshinori Sato <ysato@users.sourceforge.jp>
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*
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*/
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/kernel.h>
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#include <asm/ptrace.h>
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#include <asm/traps.h>
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#include <asm/irq.h>
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#include <asm/io.h>
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#include <asm/gpio-internal.h>
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#include <asm/regs267x.h>
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/* saved vector list */
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const int __initconst h8300_saved_vectors[] = {
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#if defined(CONFIG_GDB_DEBUG)
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TRACE_VEC,
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TRAP3_VEC,
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#endif
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-1
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};
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/* trap entry table */
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const H8300_VECTOR __initconst h8300_trap_table[] = {
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0,0,0,0,0,
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trace_break, /* TRACE */
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0,0,
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system_call, /* TRAPA #0 */
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0,0,0,0,0,0,0
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};
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/* IRQ pin assignment */
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struct irq_pins {
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unsigned char port_no;
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unsigned char bit_no;
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} __attribute__((aligned(1),packed));
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/* ISTR = 0 */
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static const struct irq_pins irq_assign_table0[16]={
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{H8300_GPIO_P5,H8300_GPIO_B0},{H8300_GPIO_P5,H8300_GPIO_B1},
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{H8300_GPIO_P5,H8300_GPIO_B2},{H8300_GPIO_P5,H8300_GPIO_B3},
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{H8300_GPIO_P5,H8300_GPIO_B4},{H8300_GPIO_P5,H8300_GPIO_B5},
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{H8300_GPIO_P5,H8300_GPIO_B6},{H8300_GPIO_P5,H8300_GPIO_B7},
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{H8300_GPIO_P6,H8300_GPIO_B0},{H8300_GPIO_P6,H8300_GPIO_B1},
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{H8300_GPIO_P6,H8300_GPIO_B2},{H8300_GPIO_P6,H8300_GPIO_B3},
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{H8300_GPIO_P6,H8300_GPIO_B4},{H8300_GPIO_P6,H8300_GPIO_B5},
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{H8300_GPIO_PF,H8300_GPIO_B1},{H8300_GPIO_PF,H8300_GPIO_B2},
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};
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/* ISTR = 1 */
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static const struct irq_pins irq_assign_table1[16]={
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{H8300_GPIO_P8,H8300_GPIO_B0},{H8300_GPIO_P8,H8300_GPIO_B1},
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{H8300_GPIO_P8,H8300_GPIO_B2},{H8300_GPIO_P8,H8300_GPIO_B3},
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{H8300_GPIO_P8,H8300_GPIO_B4},{H8300_GPIO_P8,H8300_GPIO_B5},
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{H8300_GPIO_PH,H8300_GPIO_B2},{H8300_GPIO_PH,H8300_GPIO_B3},
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{H8300_GPIO_P2,H8300_GPIO_B0},{H8300_GPIO_P2,H8300_GPIO_B1},
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{H8300_GPIO_P2,H8300_GPIO_B2},{H8300_GPIO_P2,H8300_GPIO_B3},
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{H8300_GPIO_P2,H8300_GPIO_B4},{H8300_GPIO_P2,H8300_GPIO_B5},
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{H8300_GPIO_P2,H8300_GPIO_B6},{H8300_GPIO_P2,H8300_GPIO_B7},
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};
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/* IRQ to GPIO pin translation */
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#define IRQ_GPIO_MAP(irqbit,irq,port,bit) \
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do { \
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if (*(volatile unsigned short *)ITSR & irqbit) { \
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port = irq_assign_table1[irq - EXT_IRQ0].port_no; \
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bit = irq_assign_table1[irq - EXT_IRQ0].bit_no; \
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} else { \
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port = irq_assign_table0[irq - EXT_IRQ0].port_no; \
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bit = irq_assign_table0[irq - EXT_IRQ0].bit_no; \
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} \
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} while(0)
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int h8300_enable_irq_pin(unsigned int irq)
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{
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if (irq >= EXT_IRQ0 && irq <= EXT_IRQ15) {
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unsigned short ptn = 1 << (irq - EXT_IRQ0);
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unsigned int port_no,bit_no;
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IRQ_GPIO_MAP(ptn, irq, port_no, bit_no);
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if (H8300_GPIO_RESERVE(port_no, bit_no) == 0)
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return -EBUSY; /* pin already use */
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H8300_GPIO_DDR(port_no, bit_no, H8300_GPIO_INPUT);
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*(volatile unsigned short *)ISR &= ~ptn; /* ISR clear */
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}
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return 0;
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}
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void h8300_disable_irq_pin(unsigned int irq)
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{
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if (irq >= EXT_IRQ0 && irq <= EXT_IRQ15) {
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/* disable interrupt & release IRQ pin */
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unsigned short ptn = 1 << (irq - EXT_IRQ0);
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unsigned short port_no,bit_no;
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*(volatile unsigned short *)ISR &= ~ptn;
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*(volatile unsigned short *)IER &= ~ptn;
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IRQ_GPIO_MAP(ptn, irq, port_no, bit_no);
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H8300_GPIO_FREE(port_no, bit_no);
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}
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}
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