f99d603412
This patch converts dma_alloc/free/mmap_{coherent,writecombine}
functions to use generic alloc/free/mmap methods from dma_map_ops
structure. A new DMA_ATTR_WRITE_COMBINE DMA attribute have been
introduced to implement writecombine methods.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Tested-By: Subash Patel <subash.ramaswamy@linaro.org>
285 lines
8.9 KiB
C
285 lines
8.9 KiB
C
#ifndef ASMARM_DMA_MAPPING_H
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#define ASMARM_DMA_MAPPING_H
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#ifdef __KERNEL__
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#include <linux/mm_types.h>
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#include <linux/scatterlist.h>
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#include <linux/dma-attrs.h>
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#include <linux/dma-debug.h>
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#include <asm-generic/dma-coherent.h>
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#include <asm/memory.h>
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#define DMA_ERROR_CODE (~0)
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extern struct dma_map_ops arm_dma_ops;
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static inline struct dma_map_ops *get_dma_ops(struct device *dev)
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{
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if (dev && dev->archdata.dma_ops)
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return dev->archdata.dma_ops;
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return &arm_dma_ops;
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}
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static inline void set_dma_ops(struct device *dev, struct dma_map_ops *ops)
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{
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BUG_ON(!dev);
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dev->archdata.dma_ops = ops;
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}
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#include <asm-generic/dma-mapping-common.h>
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static inline int dma_set_mask(struct device *dev, u64 mask)
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{
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return get_dma_ops(dev)->set_dma_mask(dev, mask);
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}
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#ifdef __arch_page_to_dma
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#error Please update to __arch_pfn_to_dma
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#endif
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/*
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* dma_to_pfn/pfn_to_dma/dma_to_virt/virt_to_dma are architecture private
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* functions used internally by the DMA-mapping API to provide DMA
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* addresses. They must not be used by drivers.
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*/
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#ifndef __arch_pfn_to_dma
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static inline dma_addr_t pfn_to_dma(struct device *dev, unsigned long pfn)
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{
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return (dma_addr_t)__pfn_to_bus(pfn);
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}
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static inline unsigned long dma_to_pfn(struct device *dev, dma_addr_t addr)
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{
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return __bus_to_pfn(addr);
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}
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static inline void *dma_to_virt(struct device *dev, dma_addr_t addr)
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{
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return (void *)__bus_to_virt((unsigned long)addr);
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}
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static inline dma_addr_t virt_to_dma(struct device *dev, void *addr)
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{
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return (dma_addr_t)__virt_to_bus((unsigned long)(addr));
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}
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#else
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static inline dma_addr_t pfn_to_dma(struct device *dev, unsigned long pfn)
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{
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return __arch_pfn_to_dma(dev, pfn);
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}
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static inline unsigned long dma_to_pfn(struct device *dev, dma_addr_t addr)
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{
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return __arch_dma_to_pfn(dev, addr);
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}
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static inline void *dma_to_virt(struct device *dev, dma_addr_t addr)
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{
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return __arch_dma_to_virt(dev, addr);
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}
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static inline dma_addr_t virt_to_dma(struct device *dev, void *addr)
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{
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return __arch_virt_to_dma(dev, addr);
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}
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#endif
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/*
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* DMA errors are defined by all-bits-set in the DMA address.
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*/
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static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
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{
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return dma_addr == DMA_ERROR_CODE;
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}
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/*
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* Dummy noncoherent implementation. We don't provide a dma_cache_sync
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* function so drivers using this API are highlighted with build warnings.
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*/
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static inline void *dma_alloc_noncoherent(struct device *dev, size_t size,
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dma_addr_t *handle, gfp_t gfp)
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{
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return NULL;
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}
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static inline void dma_free_noncoherent(struct device *dev, size_t size,
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void *cpu_addr, dma_addr_t handle)
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{
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}
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extern int dma_supported(struct device *dev, u64 mask);
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/**
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* arm_dma_alloc - allocate consistent memory for DMA
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* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
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* @size: required memory size
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* @handle: bus-specific DMA address
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* @attrs: optinal attributes that specific mapping properties
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*
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* Allocate some memory for a device for performing DMA. This function
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* allocates pages, and will return the CPU-viewed address, and sets @handle
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* to be the device-viewed address.
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*/
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extern void *arm_dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
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gfp_t gfp, struct dma_attrs *attrs);
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#define dma_alloc_coherent(d, s, h, f) dma_alloc_attrs(d, s, h, f, NULL)
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static inline void *dma_alloc_attrs(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t flag,
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struct dma_attrs *attrs)
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{
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struct dma_map_ops *ops = get_dma_ops(dev);
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void *cpu_addr;
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BUG_ON(!ops);
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cpu_addr = ops->alloc(dev, size, dma_handle, flag, attrs);
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debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr);
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return cpu_addr;
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}
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/**
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* arm_dma_free - free memory allocated by arm_dma_alloc
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* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
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* @size: size of memory originally requested in dma_alloc_coherent
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* @cpu_addr: CPU-view address returned from dma_alloc_coherent
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* @handle: device-view address returned from dma_alloc_coherent
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* @attrs: optinal attributes that specific mapping properties
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*
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* Free (and unmap) a DMA buffer previously allocated by
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* arm_dma_alloc().
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*
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* References to memory and mappings associated with cpu_addr/handle
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* during and after this call executing are illegal.
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*/
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extern void arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
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dma_addr_t handle, struct dma_attrs *attrs);
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#define dma_free_coherent(d, s, c, h) dma_free_attrs(d, s, c, h, NULL)
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static inline void dma_free_attrs(struct device *dev, size_t size,
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void *cpu_addr, dma_addr_t dma_handle,
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struct dma_attrs *attrs)
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{
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struct dma_map_ops *ops = get_dma_ops(dev);
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BUG_ON(!ops);
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debug_dma_free_coherent(dev, size, cpu_addr, dma_handle);
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ops->free(dev, size, cpu_addr, dma_handle, attrs);
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}
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/**
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* arm_dma_mmap - map a coherent DMA allocation into user space
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* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
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* @vma: vm_area_struct describing requested user mapping
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* @cpu_addr: kernel CPU-view address returned from dma_alloc_coherent
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* @handle: device-view address returned from dma_alloc_coherent
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* @size: size of memory originally requested in dma_alloc_coherent
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* @attrs: optinal attributes that specific mapping properties
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*
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* Map a coherent DMA buffer previously allocated by dma_alloc_coherent
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* into user space. The coherent DMA buffer must not be freed by the
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* driver until the user space mapping has been released.
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*/
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extern int arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,
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void *cpu_addr, dma_addr_t dma_addr, size_t size,
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struct dma_attrs *attrs);
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#define dma_mmap_coherent(d, v, c, h, s) dma_mmap_attrs(d, v, c, h, s, NULL)
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static inline int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
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void *cpu_addr, dma_addr_t dma_addr,
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size_t size, struct dma_attrs *attrs)
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{
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struct dma_map_ops *ops = get_dma_ops(dev);
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BUG_ON(!ops);
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return ops->mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
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}
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static inline void *dma_alloc_writecombine(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t flag)
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{
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DEFINE_DMA_ATTRS(attrs);
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dma_set_attr(DMA_ATTR_WRITE_COMBINE, &attrs);
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return dma_alloc_attrs(dev, size, dma_handle, flag, &attrs);
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}
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static inline void dma_free_writecombine(struct device *dev, size_t size,
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void *cpu_addr, dma_addr_t dma_handle)
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{
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DEFINE_DMA_ATTRS(attrs);
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dma_set_attr(DMA_ATTR_WRITE_COMBINE, &attrs);
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return dma_free_attrs(dev, size, cpu_addr, dma_handle, &attrs);
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}
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static inline int dma_mmap_writecombine(struct device *dev, struct vm_area_struct *vma,
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void *cpu_addr, dma_addr_t dma_addr, size_t size)
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{
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DEFINE_DMA_ATTRS(attrs);
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dma_set_attr(DMA_ATTR_WRITE_COMBINE, &attrs);
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return dma_mmap_attrs(dev, vma, cpu_addr, dma_addr, size, &attrs);
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}
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/*
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* This can be called during boot to increase the size of the consistent
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* DMA region above it's default value of 2MB. It must be called before the
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* memory allocator is initialised, i.e. before any core_initcall.
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*/
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extern void __init init_consistent_dma_size(unsigned long size);
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/*
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* For SA-1111, IXP425, and ADI systems the dma-mapping functions are "magic"
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* and utilize bounce buffers as needed to work around limited DMA windows.
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*
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* On the SA-1111, a bug limits DMA to only certain regions of RAM.
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* On the IXP425, the PCI inbound window is 64MB (256MB total RAM)
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* On some ADI engineering systems, PCI inbound window is 32MB (12MB total RAM)
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*
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* The following are helper functions used by the dmabounce subystem
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*
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*/
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/**
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* dmabounce_register_dev
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*
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* @dev: valid struct device pointer
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* @small_buf_size: size of buffers to use with small buffer pool
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* @large_buf_size: size of buffers to use with large buffer pool (can be 0)
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* @needs_bounce_fn: called to determine whether buffer needs bouncing
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*
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* This function should be called by low-level platform code to register
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* a device as requireing DMA buffer bouncing. The function will allocate
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* appropriate DMA pools for the device.
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*/
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extern int dmabounce_register_dev(struct device *, unsigned long,
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unsigned long, int (*)(struct device *, dma_addr_t, size_t));
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/**
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* dmabounce_unregister_dev
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*
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* @dev: valid struct device pointer
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*
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* This function should be called by low-level platform code when device
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* that was previously registered with dmabounce_register_dev is removed
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* from the system.
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*
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*/
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extern void dmabounce_unregister_dev(struct device *);
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/*
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* The scatter list versions of the above methods.
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*/
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extern int arm_dma_map_sg(struct device *, struct scatterlist *, int,
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enum dma_data_direction, struct dma_attrs *attrs);
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extern void arm_dma_unmap_sg(struct device *, struct scatterlist *, int,
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enum dma_data_direction, struct dma_attrs *attrs);
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extern void arm_dma_sync_sg_for_cpu(struct device *, struct scatterlist *, int,
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enum dma_data_direction);
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extern void arm_dma_sync_sg_for_device(struct device *, struct scatterlist *, int,
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enum dma_data_direction);
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#endif /* __KERNEL__ */
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#endif
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