Now that Yosemite's gone we can move the MSP71xx code one level up. Shane McDonald <mcdonald.shane@gmail.com>'s https://patchwork.linux-mips.org/patch/4736/ has been folded into this patch. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
		
			
				
	
	
		
			146 lines
		
	
	
	
		
			4.6 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			146 lines
		
	
	
	
		
			4.6 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * Generic PMC MSP71xx EXTENDED (EXD) GPIO handling. The extended gpio is
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 * a set of hardware registers that have no need for explicit locking as
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 * it is handled by unique method of writing individual set/clr bits.
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 *
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 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License version 2 as
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 * published by the Free Software Foundation.
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 *
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 * @author Patrick Glass <patrickglass@gmail.com>
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 */
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/gpio.h>
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#include <linux/io.h>
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#define MSP71XX_DATA_OFFSET(gpio)	(2 * (gpio))
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#define MSP71XX_READ_OFFSET(gpio)	(MSP71XX_DATA_OFFSET(gpio) + 1)
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#define MSP71XX_CFG_OUT_OFFSET(gpio)	(MSP71XX_DATA_OFFSET(gpio) + 16)
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#define MSP71XX_CFG_IN_OFFSET(gpio)	(MSP71XX_CFG_OUT_OFFSET(gpio) + 1)
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#define MSP71XX_EXD_GPIO_BASE	0x0BC000000L
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#define to_msp71xx_exd_gpio_chip(c) \
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			container_of(c, struct msp71xx_exd_gpio_chip, chip)
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/*
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 * struct msp71xx_exd_gpio_chip - container for gpio chip and registers
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 * @chip: chip structure for the specified gpio bank
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 * @reg: register for control and data of gpio pin
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 */
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struct msp71xx_exd_gpio_chip {
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	struct gpio_chip chip;
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	void __iomem *reg;
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};
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/*
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 * msp71xx_exd_gpio_get() - return the chip's gpio value
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 * @chip: chip structure which controls the specified gpio
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 * @offset: gpio whose value will be returned
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 *
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 * It will return 0 if gpio value is low and other if high.
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 */
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static int msp71xx_exd_gpio_get(struct gpio_chip *chip, unsigned offset)
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{
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	struct msp71xx_exd_gpio_chip *msp71xx_chip =
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	    to_msp71xx_exd_gpio_chip(chip);
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	const unsigned bit = MSP71XX_READ_OFFSET(offset);
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	return __raw_readl(msp71xx_chip->reg) & (1 << bit);
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}
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/*
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 * msp71xx_exd_gpio_set() - set the output value for the gpio
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 * @chip: chip structure who controls the specified gpio
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 * @offset: gpio whose value will be assigned
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 * @value: logic level to assign to the gpio initially
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 *
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 * This will set the gpio bit specified to the desired value. It will set the
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 * gpio pin low if value is 0 otherwise it will be high.
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 */
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static void msp71xx_exd_gpio_set(struct gpio_chip *chip,
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				 unsigned offset, int value)
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{
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	struct msp71xx_exd_gpio_chip *msp71xx_chip =
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	    to_msp71xx_exd_gpio_chip(chip);
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	const unsigned bit = MSP71XX_DATA_OFFSET(offset);
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	__raw_writel(1 << (bit + (value ? 1 : 0)), msp71xx_chip->reg);
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}
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/*
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 * msp71xx_exd_direction_output() - declare the direction mode for a gpio
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 * @chip: chip structure which controls the specified gpio
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 * @offset: gpio whose value will be assigned
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 * @value: logic level to assign to the gpio initially
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 *
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 * This call will set the mode for the @gpio to output. It will set the
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 * gpio pin low if value is 0 otherwise it will be high.
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 */
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static int msp71xx_exd_direction_output(struct gpio_chip *chip,
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					unsigned offset, int value)
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{
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	struct msp71xx_exd_gpio_chip *msp71xx_chip =
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	    to_msp71xx_exd_gpio_chip(chip);
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	msp71xx_exd_gpio_set(chip, offset, value);
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	__raw_writel(1 << MSP71XX_CFG_OUT_OFFSET(offset), msp71xx_chip->reg);
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	return 0;
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}
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/*
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 * msp71xx_exd_direction_input() - declare the direction mode for a gpio
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 * @chip: chip structure which controls the specified gpio
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 * @offset: gpio whose to which the value will be assigned
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 *
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 * This call will set the mode for the @gpio to input.
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 */
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static int msp71xx_exd_direction_input(struct gpio_chip *chip, unsigned offset)
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{
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	struct msp71xx_exd_gpio_chip *msp71xx_chip =
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	    to_msp71xx_exd_gpio_chip(chip);
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	__raw_writel(1 << MSP71XX_CFG_IN_OFFSET(offset), msp71xx_chip->reg);
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	return 0;
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}
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#define MSP71XX_EXD_GPIO_BANK(name, exd_reg, base_gpio, num_gpio) \
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{ \
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	.chip = { \
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		.label		  = name, \
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		.direction_input  = msp71xx_exd_direction_input, \
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		.direction_output = msp71xx_exd_direction_output, \
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		.get		  = msp71xx_exd_gpio_get, \
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		.set		  = msp71xx_exd_gpio_set, \
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		.base		  = base_gpio, \
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		.ngpio		  = num_gpio, \
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	}, \
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	.reg	= (void __iomem *)(MSP71XX_EXD_GPIO_BASE + exd_reg), \
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}
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/*
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 * struct msp71xx_exd_gpio_banks[] - container array of gpio banks
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 * @chip: chip structure for the specified gpio bank
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 * @reg: register for reading and writing the gpio pin value
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 *
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 * This array structure defines the extended gpio banks for the
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 * PMC MIPS Processor. We specify the bank name, the data/config
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 * register,the base starting gpio number, and the number of
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 * gpios exposed by the bank of gpios.
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 */
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static struct msp71xx_exd_gpio_chip msp71xx_exd_gpio_banks[] = {
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	MSP71XX_EXD_GPIO_BANK("GPIO_23_16", 0x188, 16, 8),
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	MSP71XX_EXD_GPIO_BANK("GPIO_27_24", 0x18C, 24, 4),
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};
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void __init msp71xx_init_gpio_extended(void)
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{
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	int i;
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	for (i = 0; i < ARRAY_SIZE(msp71xx_exd_gpio_banks); i++)
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		gpiochip_add(&msp71xx_exd_gpio_banks[i].chip);
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}
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