 0a9426df18
			
		
	
	
	0a9426df18
	
	
	
		
			
			Signed-off-by: David Howells <dhowells@redhat.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Michael Kerrisk <mtk.manpages@gmail.com> Acked-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Acked-by: Dave Jones <davej@redhat.com>
		
			
				
	
	
		
			38 lines
		
	
	
	
		
			1 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			38 lines
		
	
	
	
		
			1 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
| #ifndef __ASM_SH_AUXVEC_H
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| #define __ASM_SH_AUXVEC_H
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| 
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| /*
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|  * Architecture-neutral AT_ values in 0-17, leave some room
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|  * for more of them.
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|  */
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| 
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| /*
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|  * This entry gives some information about the FPU initialization
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|  * performed by the kernel.
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|  */
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| #define AT_FPUCW		18	/* Used FPU control word.  */
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| 
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| #if defined(CONFIG_VSYSCALL) || !defined(__KERNEL__)
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| /*
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|  * Only define this in the vsyscall case, the entry point to
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|  * the vsyscall page gets placed here. The kernel will attempt
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|  * to build a gate VMA we don't care about otherwise..
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|  */
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| #define AT_SYSINFO_EHDR		33
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| #endif
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| 
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| /*
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|  * More complete cache descriptions than AT_[DIU]CACHEBSIZE.  If the
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|  * value is -1, then the cache doesn't exist.  Otherwise:
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|  *
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|  *    bit 0-3:	  Cache set-associativity; 0 means fully associative.
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|  *    bit 4-7:	  Log2 of cacheline size.
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|  *    bit 8-31:	  Size of the entire cache >> 8.
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|  */
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| #define AT_L1I_CACHESHAPE	34
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| #define AT_L1D_CACHESHAPE	35
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| #define AT_L2_CACHESHAPE	36
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| 
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| #define AT_VECTOR_SIZE_ARCH 5 /* entries in ARCH_DLINFO */
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| 
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| #endif /* __ASM_SH_AUXVEC_H */
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