fabb626ad6
Cosmetic updates and trivial fixes of m32r arch-dependent files. - Remove RCS ID strings and trailing white lines - Other misc. cosmetic updates Signed-off-by: Hirokazu Takata <takata@linux-m32r.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
320 lines
6.8 KiB
ArmAsm
320 lines
6.8 KiB
ArmAsm
/*
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* INET An implementation of the TCP/IP protocol suite for the LINUX
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* operating system. INET is implemented using the BSD Socket
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* interface as the means of communication with the user level.
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*
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* IP/TCP/UDP checksumming routines
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*
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* Authors: Jorge Cwik, <jorge@laser.satlink.net>
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* Arnt Gulbrandsen, <agulbra@nvg.unit.no>
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* Tom May, <ftom@netcom.com>
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* Pentium Pro/II routines:
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* Alexander Kjeldaas <astor@guardian.no>
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* Finn Arne Gangstad <finnag@guardian.no>
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* Lots of code moved from tcp.c and ip.c; see those files
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* for more names.
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*
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* Changes: Ingo Molnar, converted csum_partial_copy() to 2.1 exception
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* handling.
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* Andi Kleen, add zeroing on error
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* converted to pure assembler
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* Hirokazu Takata,Hiroyuki Kondo rewrite for the m32r architecture.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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#include <asm/errno.h>
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/*
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* computes a partial checksum, e.g. for TCP/UDP fragments
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*/
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/*
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unsigned int csum_partial(const unsigned char * buff, int len, unsigned int sum)
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*/
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#ifdef CONFIG_ISA_DUAL_ISSUE
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/*
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* Experiments with Ethernet and SLIP connections show that buff
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* is aligned on either a 2-byte or 4-byte boundary. We get at
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* least a twofold speedup on 486 and Pentium if it is 4-byte aligned.
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* Fortunately, it is easy to convert 2-byte alignment to 4-byte
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* alignment for the unrolled loop.
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*/
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.text
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ENTRY(csum_partial)
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; Function args
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; r0: unsigned char *buff
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; r1: int len
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; r2: unsigned int sum
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push r2 || ldi r2, #0
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and3 r7, r0, #1 ; Check alignment.
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beqz r7, 1f ; Jump if alignment is ok.
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; 1-byte mis aligned
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ldub r4, @r0 || addi r0, #1
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; clear c-bit || Alignment uses up bytes.
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cmp r0, r0 || addi r1, #-1
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ldi r3, #0 || addx r2, r4
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addx r2, r3
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.fillinsn
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1:
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and3 r4, r0, #2 ; Check alignment.
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beqz r4, 2f ; Jump if alignment is ok.
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; clear c-bit || Alignment uses up two bytes.
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cmp r0, r0 || addi r1, #-2
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bgtz r1, 1f ; Jump if we had at least two bytes.
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bra 4f || addi r1, #2
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.fillinsn ; len(r1) was < 2. Deal with it.
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1:
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; 2-byte aligned
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lduh r4, @r0 || ldi r3, #0
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addx r2, r4 || addi r0, #2
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addx r2, r3
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.fillinsn
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2:
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; 4-byte aligned
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cmp r0, r0 ; clear c-bit
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srl3 r6, r1, #5
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beqz r6, 2f
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.fillinsn
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1: ld r3, @r0+
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ld r4, @r0+ ; +4
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ld r5, @r0+ ; +8
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ld r3, @r0+ || addx r2, r3 ; +12
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ld r4, @r0+ || addx r2, r4 ; +16
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ld r5, @r0+ || addx r2, r5 ; +20
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ld r3, @r0+ || addx r2, r3 ; +24
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ld r4, @r0+ || addx r2, r4 ; +28
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addx r2, r5 || addi r6, #-1
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addx r2, r3
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addx r2, r4
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bnez r6, 1b
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addx r2, r6 ; r6=0
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cmp r0, r0 ; This clears c-bit
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.fillinsn
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2: and3 r6, r1, #0x1c ; withdraw len
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beqz r6, 4f
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srli r6, #2
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.fillinsn
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3: ld r4, @r0+ || addi r6, #-1
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addx r2, r4
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bnez r6, 3b
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addx r2, r6 ; r6=0
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cmp r0, r0 ; This clears c-bit
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.fillinsn
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4: and3 r1, r1, #3
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beqz r1, 7f ; if len == 0 goto end
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and3 r6, r1, #2
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beqz r6, 5f ; if len < 2 goto 5f(1byte)
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lduh r4, @r0 || addi r0, #2
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addi r1, #-2 || slli r4, #16
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addx r2, r4
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beqz r1, 6f
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.fillinsn
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5: ldub r4, @r0 || ldi r1, #0
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#ifndef __LITTLE_ENDIAN__
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slli r4, #8
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#endif
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addx r2, r4
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.fillinsn
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6: addx r2, r1
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.fillinsn
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7:
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and3 r0, r2, #0xffff
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srli r2, #16
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add r0, r2
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srl3 r2, r0, #16
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beqz r2, 1f
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addi r0, #1
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and3 r0, r0, #0xffff
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.fillinsn
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1:
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beqz r7, 1f ; swap the upper byte for the lower
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and3 r2, r0, #0xff
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srl3 r0, r0, #8
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slli r2, #8
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or r0, r2
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.fillinsn
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1:
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pop r2 || cmp r0, r0
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addx r0, r2 || ldi r2, #0
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addx r0, r2
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jmp r14
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#else /* not CONFIG_ISA_DUAL_ISSUE */
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/*
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* Experiments with Ethernet and SLIP connections show that buff
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* is aligned on either a 2-byte or 4-byte boundary. We get at
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* least a twofold speedup on 486 and Pentium if it is 4-byte aligned.
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* Fortunately, it is easy to convert 2-byte alignment to 4-byte
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* alignment for the unrolled loop.
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*/
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.text
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ENTRY(csum_partial)
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; Function args
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; r0: unsigned char *buff
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; r1: int len
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; r2: unsigned int sum
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push r2
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ldi r2, #0
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and3 r7, r0, #1 ; Check alignment.
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beqz r7, 1f ; Jump if alignment is ok.
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; 1-byte mis aligned
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ldub r4, @r0
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addi r0, #1
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addi r1, #-1 ; Alignment uses up bytes.
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cmp r0, r0 ; clear c-bit
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ldi r3, #0
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addx r2, r4
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addx r2, r3
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.fillinsn
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1:
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and3 r4, r0, #2 ; Check alignment.
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beqz r4, 2f ; Jump if alignment is ok.
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addi r1, #-2 ; Alignment uses up two bytes.
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cmp r0, r0 ; clear c-bit
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bgtz r1, 1f ; Jump if we had at least two bytes.
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addi r1, #2 ; len(r1) was < 2. Deal with it.
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bra 4f
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.fillinsn
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1:
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; 2-byte aligned
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lduh r4, @r0
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addi r0, #2
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ldi r3, #0
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addx r2, r4
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addx r2, r3
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.fillinsn
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2:
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; 4-byte aligned
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cmp r0, r0 ; clear c-bit
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srl3 r6, r1, #5
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beqz r6, 2f
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.fillinsn
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1: ld r3, @r0+
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ld r4, @r0+ ; +4
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ld r5, @r0+ ; +8
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addx r2, r3
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addx r2, r4
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addx r2, r5
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ld r3, @r0+ ; +12
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ld r4, @r0+ ; +16
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ld r5, @r0+ ; +20
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addx r2, r3
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addx r2, r4
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addx r2, r5
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ld r3, @r0+ ; +24
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ld r4, @r0+ ; +28
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addi r6, #-1
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addx r2, r3
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addx r2, r4
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bnez r6, 1b
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addx r2, r6 ; r6=0
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cmp r0, r0 ; This clears c-bit
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.fillinsn
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2: and3 r6, r1, #0x1c ; withdraw len
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beqz r6, 4f
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srli r6, #2
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.fillinsn
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3: ld r4, @r0+
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addi r6, #-1
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addx r2, r4
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bnez r6, 3b
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addx r2, r6 ; r6=0
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cmp r0, r0 ; This clears c-bit
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.fillinsn
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4: and3 r1, r1, #3
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beqz r1, 7f ; if len == 0 goto end
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and3 r6, r1, #2
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beqz r6, 5f ; if len < 2 goto 5f(1byte)
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lduh r4, @r0
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addi r0, #2
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addi r1, #-2
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slli r4, #16
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addx r2, r4
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beqz r1, 6f
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.fillinsn
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5: ldub r4, @r0
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#ifndef __LITTLE_ENDIAN__
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slli r4, #8
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#endif
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addx r2, r4
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.fillinsn
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6: ldi r5, #0
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addx r2, r5
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.fillinsn
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7:
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and3 r0, r2, #0xffff
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srli r2, #16
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add r0, r2
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srl3 r2, r0, #16
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beqz r2, 1f
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addi r0, #1
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and3 r0, r0, #0xffff
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.fillinsn
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1:
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beqz r7, 1f
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mv r2, r0
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srl3 r0, r2, #8
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and3 r2, r2, #0xff
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slli r2, #8
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or r0, r2
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.fillinsn
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1:
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pop r2
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cmp r0, r0
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addx r0, r2
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ldi r2, #0
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addx r0, r2
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jmp r14
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#endif /* not CONFIG_ISA_DUAL_ISSUE */
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/*
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unsigned int csum_partial_copy_generic (const char *src, char *dst,
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int len, int sum, int *src_err_ptr, int *dst_err_ptr)
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*/
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/*
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* Copy from ds while checksumming, otherwise like csum_partial
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*
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* The macros SRC and DST specify the type of access for the instruction.
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* thus we can call a custom exception handler for all access types.
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*
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* FIXME: could someone double-check whether I haven't mixed up some SRC and
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* DST definitions? It's damn hard to trigger all cases. I hope I got
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* them all but there's no guarantee.
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*/
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ENTRY(csum_partial_copy_generic)
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nop
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nop
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nop
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nop
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jmp r14
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nop
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nop
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nop
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.end
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