 5c04b57fe3
			
		
	
	
	5c04b57fe3
	
	
	
		
			
			Enable a cold or warm reset to the HW from userspace. Also fix a few sparse errors: warning: symbol 'sys_manager_base_addr' was not declared. Should it be static? warning: symbol 'rst_manager_base_addr' was not declared. Should it be static? Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Reviewed-by: Pavel Machek <pavel@denx.de> Signed-off-by: Olof Johansson <olof@lixom.net>
		
			
				
	
	
		
			47 lines
		
	
	
	
		
			1.5 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			47 lines
		
	
	
	
		
			1.5 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Copyright 2012 Pavel Machek <pavel@denx.de>
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|  * Copyright (C) 2012 Altera Corporation
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|  *
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|  * This program is free software; you can redistribute it and/or modify
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|  * it under the terms of the GNU General Public License as published by
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|  * the Free Software Foundation; either version 2 of the License, or
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|  * (at your option) any later version.
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|  *
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|  * This program is distributed in the hope that it will be useful,
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|  * but WITHOUT ANY WARRANTY; without even the implied warranty of
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|  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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|  * GNU General Public License for more details.
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|  *
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|  * You should have received a copy of the GNU General Public License
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|  * along with this program; if not, write to the Free Software
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|  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
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|  */
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| 
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| #ifndef __MACH_CORE_H
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| #define __MACH_CORE_H
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| 
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| #define SOCFPGA_RSTMGR_CTRL	0x04
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| #define SOCFPGA_RSTMGR_MODPERRST	0x14
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| #define SOCFPGA_RSTMGR_BRGMODRST	0x1c
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| 
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| /* System Manager bits */
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| #define RSTMGR_CTRL_SWCOLDRSTREQ	0x1	/* Cold Reset */
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| #define RSTMGR_CTRL_SWWARMRSTREQ	0x2	/* Warm Reset */
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| 
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| extern void socfpga_secondary_startup(void);
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| extern void __iomem *socfpga_scu_base_addr;
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| 
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| extern void socfpga_init_clocks(void);
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| extern void socfpga_sysmgr_init(void);
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| 
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| extern void __iomem *sys_manager_base_addr;
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| extern void __iomem *rst_manager_base_addr;
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| 
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| extern struct smp_operations socfpga_smp_ops;
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| extern char secondary_trampoline, secondary_trampoline_end;
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| 
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| extern unsigned long cpu1start_addr;
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| 
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| #define SOCFPGA_SCU_VIRT_BASE   0xfffec000
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| 
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| #endif
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