 db01120c5f
			
		
	
	
	db01120c5f
	
	
	
		
			
			The GPIO API defines 0 as being a valid GPIO number, so this field needs to be initialized explicitly. A special case is the Palm Tungsten|C board. Since it doesn't use any quirks that would require the existing .init() or .exit() hooks it can simply use the new enable_gpio field. Signed-off-by: Thierry Reding <treding@nvidia.com>
		
			
				
	
	
		
			510 lines
		
	
	
	
		
			12 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			510 lines
		
	
	
	
		
			12 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
 | |
|  * linux/arch/arm/mach-pxa/lpd270.c
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|  *
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|  * Support for the LogicPD PXA270 Card Engine.
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|  * Derived from the mainstone code, which carries these notices:
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|  *
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|  * Author:	Nicolas Pitre
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|  * Created:	Nov 05, 2002
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|  * Copyright:	MontaVista Software Inc.
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|  *
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|  * This program is free software; you can redistribute it and/or modify
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|  * it under the terms of the GNU General Public License version 2 as
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|  * published by the Free Software Foundation.
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|  */
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| #include <linux/gpio.h>
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| #include <linux/init.h>
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| #include <linux/platform_device.h>
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| #include <linux/syscore_ops.h>
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| #include <linux/interrupt.h>
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| #include <linux/sched.h>
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| #include <linux/bitops.h>
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| #include <linux/fb.h>
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| #include <linux/ioport.h>
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| #include <linux/mtd/mtd.h>
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| #include <linux/mtd/partitions.h>
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| #include <linux/pwm_backlight.h>
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| 
 | |
| #include <asm/types.h>
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| #include <asm/setup.h>
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| #include <asm/memory.h>
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| #include <asm/mach-types.h>
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| #include <mach/hardware.h>
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| #include <asm/irq.h>
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| #include <asm/sizes.h>
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| 
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| #include <asm/mach/arch.h>
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| #include <asm/mach/map.h>
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| #include <asm/mach/irq.h>
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| #include <asm/mach/flash.h>
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| 
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| #include <mach/pxa27x.h>
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| #include <mach/lpd270.h>
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| #include <mach/audio.h>
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| #include <linux/platform_data/video-pxafb.h>
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| #include <linux/platform_data/mmc-pxamci.h>
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| #include <linux/platform_data/irda-pxaficp.h>
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| #include <linux/platform_data/usb-ohci-pxa27x.h>
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| #include <mach/smemc.h>
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| 
 | |
| #include "generic.h"
 | |
| #include "devices.h"
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| 
 | |
| static unsigned long lpd270_pin_config[] __initdata = {
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| 	/* Chip Selects */
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| 	GPIO15_nCS_1,	/* Mainboard Flash */
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| 	GPIO78_nCS_2,	/* CPLD + Ethernet */
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| 
 | |
| 	/* LCD - 16bpp Active TFT */
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| 	GPIO58_LCD_LDD_0,
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| 	GPIO59_LCD_LDD_1,
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| 	GPIO60_LCD_LDD_2,
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| 	GPIO61_LCD_LDD_3,
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| 	GPIO62_LCD_LDD_4,
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| 	GPIO63_LCD_LDD_5,
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| 	GPIO64_LCD_LDD_6,
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| 	GPIO65_LCD_LDD_7,
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| 	GPIO66_LCD_LDD_8,
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| 	GPIO67_LCD_LDD_9,
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| 	GPIO68_LCD_LDD_10,
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| 	GPIO69_LCD_LDD_11,
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| 	GPIO70_LCD_LDD_12,
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| 	GPIO71_LCD_LDD_13,
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| 	GPIO72_LCD_LDD_14,
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| 	GPIO73_LCD_LDD_15,
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| 	GPIO74_LCD_FCLK,
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| 	GPIO75_LCD_LCLK,
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| 	GPIO76_LCD_PCLK,
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| 	GPIO77_LCD_BIAS,
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| 	GPIO16_PWM0_OUT,	/* Backlight */
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| 
 | |
| 	/* USB Host */
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| 	GPIO88_USBH1_PWR,
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| 	GPIO89_USBH1_PEN,
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| 
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| 	/* AC97 */
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| 	GPIO28_AC97_BITCLK,
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| 	GPIO29_AC97_SDATA_IN_0,
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| 	GPIO30_AC97_SDATA_OUT,
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| 	GPIO31_AC97_SYNC,
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| 	GPIO45_AC97_SYSCLK,
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| 
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| 	GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
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| };
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| 
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| static unsigned int lpd270_irq_enabled;
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| 
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| static void lpd270_mask_irq(struct irq_data *d)
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| {
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| 	int lpd270_irq = d->irq - LPD270_IRQ(0);
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| 
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| 	__raw_writew(~(1 << lpd270_irq), LPD270_INT_STATUS);
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| 
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| 	lpd270_irq_enabled &= ~(1 << lpd270_irq);
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| 	__raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
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| }
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| 
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| static void lpd270_unmask_irq(struct irq_data *d)
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| {
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| 	int lpd270_irq = d->irq - LPD270_IRQ(0);
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| 
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| 	lpd270_irq_enabled |= 1 << lpd270_irq;
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| 	__raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
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| }
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| 
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| static struct irq_chip lpd270_irq_chip = {
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| 	.name		= "CPLD",
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| 	.irq_ack	= lpd270_mask_irq,
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| 	.irq_mask	= lpd270_mask_irq,
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| 	.irq_unmask	= lpd270_unmask_irq,
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| };
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| 
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| static void lpd270_irq_handler(unsigned int irq, struct irq_desc *desc)
 | |
| {
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| 	unsigned long pending;
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| 
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| 	pending = __raw_readw(LPD270_INT_STATUS) & lpd270_irq_enabled;
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| 	do {
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| 		/* clear useless edge notification */
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| 		desc->irq_data.chip->irq_ack(&desc->irq_data);
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| 		if (likely(pending)) {
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| 			irq = LPD270_IRQ(0) + __ffs(pending);
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| 			generic_handle_irq(irq);
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| 
 | |
| 			pending = __raw_readw(LPD270_INT_STATUS) &
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| 						lpd270_irq_enabled;
 | |
| 		}
 | |
| 	} while (pending);
 | |
| }
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| 
 | |
| static void __init lpd270_init_irq(void)
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| {
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| 	int irq;
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| 
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| 	pxa27x_init_irq();
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| 
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| 	__raw_writew(0, LPD270_INT_MASK);
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| 	__raw_writew(0, LPD270_INT_STATUS);
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| 
 | |
| 	/* setup extra LogicPD PXA270 irqs */
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| 	for (irq = LPD270_IRQ(2); irq <= LPD270_IRQ(4); irq++) {
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| 		irq_set_chip_and_handler(irq, &lpd270_irq_chip,
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| 					 handle_level_irq);
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| 		set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
 | |
| 	}
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| 	irq_set_chained_handler(PXA_GPIO_TO_IRQ(0), lpd270_irq_handler);
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| 	irq_set_irq_type(PXA_GPIO_TO_IRQ(0), IRQ_TYPE_EDGE_FALLING);
 | |
| }
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| 
 | |
| 
 | |
| #ifdef CONFIG_PM
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| static void lpd270_irq_resume(void)
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| {
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| 	__raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
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| }
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| 
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| static struct syscore_ops lpd270_irq_syscore_ops = {
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| 	.resume = lpd270_irq_resume,
 | |
| };
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| 
 | |
| static int __init lpd270_irq_device_init(void)
 | |
| {
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| 	if (machine_is_logicpd_pxa270()) {
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| 		register_syscore_ops(&lpd270_irq_syscore_ops);
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| 		return 0;
 | |
| 	}
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| 	return -ENODEV;
 | |
| }
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| 
 | |
| device_initcall(lpd270_irq_device_init);
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| #endif
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| 
 | |
| 
 | |
| static struct resource smc91x_resources[] = {
 | |
| 	[0] = {
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| 		.start	= LPD270_ETH_PHYS,
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| 		.end	= (LPD270_ETH_PHYS + 0xfffff),
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| 		.flags	= IORESOURCE_MEM,
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| 	},
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| 	[1] = {
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| 		.start	= LPD270_ETHERNET_IRQ,
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| 		.end	= LPD270_ETHERNET_IRQ,
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| 		.flags	= IORESOURCE_IRQ,
 | |
| 	},
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| };
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| 
 | |
| static struct platform_device smc91x_device = {
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| 	.name		= "smc91x",
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| 	.id		= 0,
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| 	.num_resources	= ARRAY_SIZE(smc91x_resources),
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| 	.resource	= smc91x_resources,
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| };
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| 
 | |
| static struct resource lpd270_flash_resources[] = {
 | |
| 	[0] = {
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| 		.start	= PXA_CS0_PHYS,
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| 		.end	= PXA_CS0_PHYS + SZ_64M - 1,
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| 		.flags	= IORESOURCE_MEM,
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| 	},
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| 	[1] = {
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| 		.start	= PXA_CS1_PHYS,
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| 		.end	= PXA_CS1_PHYS + SZ_64M - 1,
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| 		.flags	= IORESOURCE_MEM,
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| 	},
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| };
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| 
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| static struct mtd_partition lpd270_flash0_partitions[] = {
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| 	{
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| 		.name =		"Bootloader",
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| 		.size =		0x00040000,
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| 		.offset =	0,
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| 		.mask_flags =	MTD_WRITEABLE  /* force read-only */
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| 	}, {
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| 		.name =		"Kernel",
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| 		.size =		0x00400000,
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| 		.offset =	0x00040000,
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| 	}, {
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| 		.name =		"Filesystem",
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| 		.size =		MTDPART_SIZ_FULL,
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| 		.offset =	0x00440000
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| 	},
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| };
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| 
 | |
| static struct flash_platform_data lpd270_flash_data[2] = {
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| 	{
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| 		.name		= "processor-flash",
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| 		.map_name	= "cfi_probe",
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| 		.parts		= lpd270_flash0_partitions,
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| 		.nr_parts	= ARRAY_SIZE(lpd270_flash0_partitions),
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| 	}, {
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| 		.name		= "mainboard-flash",
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| 		.map_name	= "cfi_probe",
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| 		.parts		= NULL,
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| 		.nr_parts	= 0,
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| 	}
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| };
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| 
 | |
| static struct platform_device lpd270_flash_device[2] = {
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| 	{
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| 		.name		= "pxa2xx-flash",
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| 		.id		= 0,
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| 		.dev = {
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| 			.platform_data	= &lpd270_flash_data[0],
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| 		},
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| 		.resource	= &lpd270_flash_resources[0],
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| 		.num_resources	= 1,
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| 	}, {
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| 		.name		= "pxa2xx-flash",
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| 		.id		= 1,
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| 		.dev = {
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| 			.platform_data	= &lpd270_flash_data[1],
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| 		},
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| 		.resource	= &lpd270_flash_resources[1],
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| 		.num_resources	= 1,
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| 	},
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| };
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| 
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| static struct platform_pwm_backlight_data lpd270_backlight_data = {
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| 	.pwm_id		= 0,
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| 	.max_brightness	= 1,
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| 	.dft_brightness	= 1,
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| 	.pwm_period_ns	= 78770,
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| 	.enable_gpio	= -1,
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| };
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| 
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| static struct platform_device lpd270_backlight_device = {
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| 	.name		= "pwm-backlight",
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| 	.dev		= {
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| 		.parent	= &pxa27x_device_pwm0.dev,
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| 		.platform_data = &lpd270_backlight_data,
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| 	},
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| };
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| 
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| /* 5.7" TFT QVGA (LoLo display number 1) */
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| static struct pxafb_mode_info sharp_lq057q3dc02_mode = {
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| 	.pixclock		= 150000,
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| 	.xres			= 320,
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| 	.yres			= 240,
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| 	.bpp			= 16,
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| 	.hsync_len		= 0x14,
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| 	.left_margin		= 0x28,
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| 	.right_margin		= 0x0a,
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| 	.vsync_len		= 0x02,
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| 	.upper_margin		= 0x08,
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| 	.lower_margin		= 0x14,
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| 	.sync			= FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 | |
| };
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| 
 | |
| static struct pxafb_mach_info sharp_lq057q3dc02 = {
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| 	.modes			= &sharp_lq057q3dc02_mode,
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| 	.num_modes		= 1,
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| 	.lcd_conn		= LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
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| 				  LCD_ALTERNATE_MAPPING,
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| };
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| 
 | |
| /* 12.1" TFT SVGA (LoLo display number 2) */
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| static struct pxafb_mode_info sharp_lq121s1dg31_mode = {
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| 	.pixclock		= 50000,
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| 	.xres			= 800,
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| 	.yres			= 600,
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| 	.bpp			= 16,
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| 	.hsync_len		= 0x05,
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| 	.left_margin		= 0x52,
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| 	.right_margin		= 0x05,
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| 	.vsync_len		= 0x04,
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| 	.upper_margin		= 0x14,
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| 	.lower_margin		= 0x0a,
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| 	.sync			= FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
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| };
 | |
| 
 | |
| static struct pxafb_mach_info sharp_lq121s1dg31 = {
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| 	.modes			= &sharp_lq121s1dg31_mode,
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| 	.num_modes		= 1,
 | |
| 	.lcd_conn		= LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
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| 				  LCD_ALTERNATE_MAPPING,
 | |
| };
 | |
| 
 | |
| /* 3.6" TFT QVGA (LoLo display number 3) */
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| static struct pxafb_mode_info sharp_lq036q1da01_mode = {
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| 	.pixclock		= 150000,
 | |
| 	.xres			= 320,
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| 	.yres			= 240,
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| 	.bpp			= 16,
 | |
| 	.hsync_len		= 0x0e,
 | |
| 	.left_margin		= 0x04,
 | |
| 	.right_margin		= 0x0a,
 | |
| 	.vsync_len		= 0x03,
 | |
| 	.upper_margin		= 0x03,
 | |
| 	.lower_margin		= 0x03,
 | |
| 	.sync			= FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 | |
| };
 | |
| 
 | |
| static struct pxafb_mach_info sharp_lq036q1da01 = {
 | |
| 	.modes			= &sharp_lq036q1da01_mode,
 | |
| 	.num_modes		= 1,
 | |
| 	.lcd_conn		= LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
 | |
| 				  LCD_ALTERNATE_MAPPING,
 | |
| };
 | |
| 
 | |
| /* 6.4" TFT VGA (LoLo display number 5) */
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| static struct pxafb_mode_info sharp_lq64d343_mode = {
 | |
| 	.pixclock		= 25000,
 | |
| 	.xres			= 640,
 | |
| 	.yres			= 480,
 | |
| 	.bpp			= 16,
 | |
| 	.hsync_len		= 0x31,
 | |
| 	.left_margin		= 0x89,
 | |
| 	.right_margin		= 0x19,
 | |
| 	.vsync_len		= 0x12,
 | |
| 	.upper_margin		= 0x22,
 | |
| 	.lower_margin		= 0x00,
 | |
| 	.sync			= FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 | |
| };
 | |
| 
 | |
| static struct pxafb_mach_info sharp_lq64d343 = {
 | |
| 	.modes			= &sharp_lq64d343_mode,
 | |
| 	.num_modes		= 1,
 | |
| 	.lcd_conn		= LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
 | |
| 				  LCD_ALTERNATE_MAPPING,
 | |
| };
 | |
| 
 | |
| /* 10.4" TFT VGA (LoLo display number 7) */
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| static struct pxafb_mode_info sharp_lq10d368_mode = {
 | |
| 	.pixclock		= 25000,
 | |
| 	.xres			= 640,
 | |
| 	.yres			= 480,
 | |
| 	.bpp			= 16,
 | |
| 	.hsync_len		= 0x31,
 | |
| 	.left_margin		= 0x89,
 | |
| 	.right_margin		= 0x19,
 | |
| 	.vsync_len		= 0x12,
 | |
| 	.upper_margin		= 0x22,
 | |
| 	.lower_margin		= 0x00,
 | |
| 	.sync			= FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 | |
| };
 | |
| 
 | |
| static struct pxafb_mach_info sharp_lq10d368 = {
 | |
| 	.modes			= &sharp_lq10d368_mode,
 | |
| 	.num_modes		= 1,
 | |
| 	.lcd_conn		= LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
 | |
| 				  LCD_ALTERNATE_MAPPING,
 | |
| };
 | |
| 
 | |
| /* 3.5" TFT QVGA (LoLo display number 8) */
 | |
| static struct pxafb_mode_info sharp_lq035q7db02_20_mode = {
 | |
| 	.pixclock		= 150000,
 | |
| 	.xres			= 240,
 | |
| 	.yres			= 320,
 | |
| 	.bpp			= 16,
 | |
| 	.hsync_len		= 0x0e,
 | |
| 	.left_margin		= 0x0a,
 | |
| 	.right_margin		= 0x0a,
 | |
| 	.vsync_len		= 0x03,
 | |
| 	.upper_margin		= 0x05,
 | |
| 	.lower_margin		= 0x14,
 | |
| 	.sync			= FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 | |
| };
 | |
| 
 | |
| static struct pxafb_mach_info sharp_lq035q7db02_20 = {
 | |
| 	.modes			= &sharp_lq035q7db02_20_mode,
 | |
| 	.num_modes		= 1,
 | |
| 	.lcd_conn		= LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
 | |
| 				  LCD_ALTERNATE_MAPPING,
 | |
| };
 | |
| 
 | |
| static struct pxafb_mach_info *lpd270_lcd_to_use;
 | |
| 
 | |
| static int __init lpd270_set_lcd(char *str)
 | |
| {
 | |
| 	if (!strnicmp(str, "lq057q3dc02", 11)) {
 | |
| 		lpd270_lcd_to_use = &sharp_lq057q3dc02;
 | |
| 	} else if (!strnicmp(str, "lq121s1dg31", 11)) {
 | |
| 		lpd270_lcd_to_use = &sharp_lq121s1dg31;
 | |
| 	} else if (!strnicmp(str, "lq036q1da01", 11)) {
 | |
| 		lpd270_lcd_to_use = &sharp_lq036q1da01;
 | |
| 	} else if (!strnicmp(str, "lq64d343", 8)) {
 | |
| 		lpd270_lcd_to_use = &sharp_lq64d343;
 | |
| 	} else if (!strnicmp(str, "lq10d368", 8)) {
 | |
| 		lpd270_lcd_to_use = &sharp_lq10d368;
 | |
| 	} else if (!strnicmp(str, "lq035q7db02-20", 14)) {
 | |
| 		lpd270_lcd_to_use = &sharp_lq035q7db02_20;
 | |
| 	} else {
 | |
| 		printk(KERN_INFO "lpd270: unknown lcd panel [%s]\n", str);
 | |
| 	}
 | |
| 
 | |
| 	return 1;
 | |
| }
 | |
| 
 | |
| __setup("lcd=", lpd270_set_lcd);
 | |
| 
 | |
| static struct platform_device *platform_devices[] __initdata = {
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| 	&smc91x_device,
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| 	&lpd270_backlight_device,
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| 	&lpd270_flash_device[0],
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| 	&lpd270_flash_device[1],
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| };
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| 
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| static struct pxaohci_platform_data lpd270_ohci_platform_data = {
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| 	.port_mode	= PMM_PERPORT_MODE,
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| 	.flags		= ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW,
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| };
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| 
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| static void __init lpd270_init(void)
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| {
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| 	pxa2xx_mfp_config(ARRAY_AND_SIZE(lpd270_pin_config));
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| 
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| 	pxa_set_ffuart_info(NULL);
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| 	pxa_set_btuart_info(NULL);
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| 	pxa_set_stuart_info(NULL);
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| 
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| 	lpd270_flash_data[0].width = (__raw_readl(BOOT_DEF) & 1) ? 2 : 4;
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| 	lpd270_flash_data[1].width = 4;
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| 
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| 	/*
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| 	 * System bus arbiter setting:
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| 	 * - Core_Park
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| 	 * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4
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| 	 */
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| 	ARB_CNTRL = ARB_CORE_PARK | 0x234;
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| 
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| 	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
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| 
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| 	pxa_set_ac97_info(NULL);
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| 
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| 	if (lpd270_lcd_to_use != NULL)
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| 		pxa_set_fb_info(NULL, lpd270_lcd_to_use);
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| 
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| 	pxa_set_ohci_info(&lpd270_ohci_platform_data);
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| }
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| 
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| 
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| static struct map_desc lpd270_io_desc[] __initdata = {
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| 	{
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| 		.virtual	= (unsigned long)LPD270_CPLD_VIRT,
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| 		.pfn		= __phys_to_pfn(LPD270_CPLD_PHYS),
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| 		.length		= LPD270_CPLD_SIZE,
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| 		.type		= MT_DEVICE,
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| 	},
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| };
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| 
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| static void __init lpd270_map_io(void)
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| {
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| 	pxa27x_map_io();
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| 	iotable_init(lpd270_io_desc, ARRAY_SIZE(lpd270_io_desc));
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| 
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| 	/* for use I SRAM as framebuffer.  */
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| 	PSLR |= 0x00000F04;
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| 	PCFR  = 0x00000066;
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| }
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| 
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| MACHINE_START(LOGICPD_PXA270, "LogicPD PXA270 Card Engine")
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| 	/* Maintainer: Peter Barada */
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| 	.atag_offset	= 0x100,
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| 	.map_io		= lpd270_map_io,
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| 	.nr_irqs	= LPD270_NR_IRQS,
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| 	.init_irq	= lpd270_init_irq,
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| 	.handle_irq	= pxa27x_handle_irq,
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| 	.init_time	= pxa_timer_init,
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| 	.init_machine	= lpd270_init,
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| 	.restart	= pxa_restart,
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| MACHINE_END
 |