 4f92bab41b
			
		
	
	
	4f92bab41b
	
	
	
		
			
			This header contains minimal regbits that are currently used in code. This header has traditionally been autogenerated on OMAP4+ devices but the autogenerated contents are largely (95%) unused and hence to reduce unsued data in the kernel this header has been cut down (from the autogen output) to whatever is currently needed. This is done by running a cleanup script on top of the existing autogen script. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Ambresh K <ambresh@ti.com> [paul@pwsan.com: added generation notation in the comments] Signed-off-by: Paul Walmsley <paul@pwsan.com>
		
			
				
	
	
		
			51 lines
		
	
	
	
		
			1.9 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			51 lines
		
	
	
	
		
			1.9 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * DRA7xx Clock Management register bits
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|  *
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|  * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com
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|  *
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|  * Generated by code originally written by:
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|  * Paul Walmsley (paul@pwsan.com)
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|  * Rajendra Nayak (rnayak@ti.com)
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|  * Benoit Cousson (b-cousson@ti.com)
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|  *
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|  * This file is automatically generated from the OMAP hardware databases.
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|  * We respectfully ask that any modifications to this file be coordinated
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|  * with the public linux-omap@vger.kernel.org mailing list and the
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|  * authors above to ensure that the autogeneration scripts are kept
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|  * up-to-date with the file contents.
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|  *
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|  * This program is free software; you can redistribute it and/or modify
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|  * it under the terms of the GNU General Public License version 2 as
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|  * published by the Free Software Foundation.
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|  */
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| 
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| #ifndef __ARCH_ARM_MACH_OMAP2_CM_REGBITS_7XX_H
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| #define __ARCH_ARM_MACH_OMAP2_CM_REGBITS_7XX_H
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| 
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| #define DRA7XX_ATL_STATDEP_SHIFT				30
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| #define DRA7XX_CAM_STATDEP_SHIFT				9
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| #define DRA7XX_DSP1_STATDEP_SHIFT				1
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| #define DRA7XX_DSP2_STATDEP_SHIFT				18
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| #define DRA7XX_DSS_STATDEP_SHIFT				8
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| #define DRA7XX_EMIF_STATDEP_SHIFT				4
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| #define DRA7XX_EVE1_STATDEP_SHIFT				19
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| #define DRA7XX_EVE2_STATDEP_SHIFT				20
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| #define DRA7XX_EVE3_STATDEP_SHIFT				21
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| #define DRA7XX_EVE4_STATDEP_SHIFT				22
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| #define DRA7XX_GMAC_STATDEP_SHIFT				25
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| #define DRA7XX_GPU_STATDEP_SHIFT				10
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| #define DRA7XX_IPU1_STATDEP_SHIFT				23
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| #define DRA7XX_IPU2_STATDEP_SHIFT				0
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| #define DRA7XX_IPU_STATDEP_SHIFT				24
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| #define DRA7XX_IVA_STATDEP_SHIFT				2
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| #define DRA7XX_L3INIT_STATDEP_SHIFT				7
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| #define DRA7XX_L3MAIN1_STATDEP_SHIFT				5
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| #define DRA7XX_L4CFG_STATDEP_SHIFT				12
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| #define DRA7XX_L4PER2_STATDEP_SHIFT				26
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| #define DRA7XX_L4PER3_STATDEP_SHIFT				27
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| #define DRA7XX_L4PER_STATDEP_SHIFT				13
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| #define DRA7XX_L4SEC_STATDEP_SHIFT				14
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| #define DRA7XX_PCIE_STATDEP_SHIFT				29
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| #define DRA7XX_VPE_STATDEP_SHIFT				28
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| #define DRA7XX_WKUPAON_STATDEP_SHIFT				15
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| #endif
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