 c3ceebd7ca
			
		
	
	
	c3ceebd7ca
	
	
	
		
			
			Add support for the Broadcom BCM21664 mobile SoC. It has two Cortex-A9 cores like the BCM281xx family of chips. BCM21664 and BCM281xx share many IP blocks in addition to the ARM cores. Signed-off-by: Markus Mayer <markus.mayer@linaro.org> Signed-off-by: Matt Porter <mporter@linaro.org>
		
			
				
	
	
		
			78 lines
		
	
	
	
		
			2.1 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			78 lines
		
	
	
	
		
			2.1 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Copyright (C) 2014 Broadcom Corporation
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|  *
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|  * This program is free software; you can redistribute it and/or
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|  * modify it under the terms of the GNU General Public License as
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|  * published by the Free Software Foundation version 2.
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|  *
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|  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
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|  * kind, whether express or implied; without even the implied warranty
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|  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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|  * GNU General Public License for more details.
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|  */
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| 
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| #include <linux/clocksource.h>
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| #include <linux/of_address.h>
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| #include <linux/of_platform.h>
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| 
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| #include <asm/mach/arch.h>
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| 
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| #include "bcm_kona_smc.h"
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| #include "kona.h"
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| 
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| #define RSTMGR_DT_STRING		"brcm,bcm21664-resetmgr"
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| 
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| #define RSTMGR_REG_WR_ACCESS_OFFSET	0
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| #define RSTMGR_REG_CHIP_SOFT_RST_OFFSET	4
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| 
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| #define RSTMGR_WR_PASSWORD		0xa5a5
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| #define RSTMGR_WR_PASSWORD_SHIFT	8
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| #define RSTMGR_WR_ACCESS_ENABLE		1
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| 
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| static void bcm21664_restart(enum reboot_mode mode, const char *cmd)
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| {
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| 	void __iomem *base;
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| 	struct device_node *resetmgr;
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| 
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| 	resetmgr = of_find_compatible_node(NULL, NULL, RSTMGR_DT_STRING);
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| 	if (!resetmgr) {
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| 		pr_emerg("Couldn't find " RSTMGR_DT_STRING "\n");
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| 		return;
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| 	}
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| 	base = of_iomap(resetmgr, 0);
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| 	if (!base) {
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| 		pr_emerg("Couldn't map " RSTMGR_DT_STRING "\n");
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| 		return;
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| 	}
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| 
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| 	/*
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| 	 * A soft reset is triggered by writing a 0 to bit 0 of the soft reset
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| 	 * register. To write to that register we must first write the password
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| 	 * and the enable bit in the write access enable register.
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| 	 */
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| 	writel((RSTMGR_WR_PASSWORD << RSTMGR_WR_PASSWORD_SHIFT) |
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| 		RSTMGR_WR_ACCESS_ENABLE,
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| 		base + RSTMGR_REG_WR_ACCESS_OFFSET);
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| 	writel(0, base + RSTMGR_REG_CHIP_SOFT_RST_OFFSET);
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| 
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| 	/* Wait for reset */
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| 	while (1);
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| }
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| 
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| static void __init bcm21664_init(void)
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| {
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| 	of_platform_populate(NULL, of_default_bus_match_table, NULL,
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| 		&platform_bus);
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| 	kona_l2_cache_init();
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| }
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| 
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| static const char * const bcm21664_dt_compat[] = {
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| 	"brcm,bcm21664",
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| 	NULL,
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| };
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| 
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| DT_MACHINE_START(BCM21664_DT, "BCM21664 Broadcom Application Processor")
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| 	.init_machine = bcm21664_init,
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| 	.restart = bcm21664_restart,
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| 	.dt_compat = bcm21664_dt_compat,
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| MACHINE_END
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