436f302f7b
All three SoCs have in common they have a BMIPS32/BMIPS3300 CPU, so we can replace this as no SoC with BMIPS4350 support enabled. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Cc: linux-mips@linux-mips.org Cc: John Crispin <blogic@openwrt.org> Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Cc: Kevin Cernekee <cernekee@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/7272/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
52 lines
1.3 KiB
C
52 lines
1.3 KiB
C
#ifndef __ASM_MACH_BCM963XX_CPU_FEATURE_OVERRIDES_H
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#define __ASM_MACH_BCM963XX_CPU_FEATURE_OVERRIDES_H
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#include <bcm63xx_cpu.h>
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#define cpu_has_tlb 1
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#define cpu_has_4kex 1
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#define cpu_has_4k_cache 1
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#define cpu_has_fpu 0
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#define cpu_has_32fpr 0
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#define cpu_has_counter 1
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#define cpu_has_watch 0
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#define cpu_has_divec 1
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#define cpu_has_vce 0
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#define cpu_has_cache_cdex_p 0
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#define cpu_has_cache_cdex_s 0
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#define cpu_has_prefetch 1
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#define cpu_has_mcheck 1
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#define cpu_has_ejtag 1
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#define cpu_has_llsc 1
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#define cpu_has_mips16 0
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#define cpu_has_mdmx 0
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#define cpu_has_mips3d 0
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#define cpu_has_smartmips 0
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#define cpu_has_vtag_icache 0
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#if !defined(CONFIG_SYS_HAS_CPU_BMIPS4350)
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#define cpu_has_dc_aliases 0
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#endif
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#define cpu_has_ic_fills_f_dc 0
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#define cpu_has_pindexed_dcache 0
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#define cpu_has_mips32r1 1
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#define cpu_has_mips32r2 0
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#define cpu_has_mips64r1 0
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#define cpu_has_mips64r2 0
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#define cpu_has_dsp 0
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#define cpu_has_dsp2 0
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#define cpu_has_mipsmt 0
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#define cpu_has_userlocal 0
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#define cpu_has_nofpuex 0
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#define cpu_has_64bits 0
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#define cpu_has_64bit_zero_reg 0
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#define cpu_dcache_line_size() 16
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#define cpu_icache_line_size() 16
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#define cpu_scache_line_size() 0
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#endif /* __ASM_MACH_BCM963XX_CPU_FEATURE_OVERRIDES_H */
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