4be505d4fc
The ARM GIC binding defines a few custom cells and flags for its IRQ specifier. Provide names for those. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Rob Herring <rob.herring@calxeda.com>
22 lines
490 B
C
22 lines
490 B
C
/*
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* This header provides constants for the ARM GIC.
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*/
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#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H
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#define _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H
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#include <dt-bindings/interrupt-controller/irq.h>
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/* interrupt specific cell 0 */
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#define GIC_SPI 0
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#define GIC_PPI 1
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/*
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* Interrupt specifier cell 2.
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* The flaggs in irq.h are valid, plus those below.
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*/
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#define GIC_CPU_MASK_RAW(x) ((x) << 8)
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#define GIC_CPU_MASK_SIMPLE(num) GIC_CPU_MASK_RAW((1 << (num)) - 1)
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#endif
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