While doing some easy cleanups on the sparc code I noticed that the CONFIG_SUN4 code seems to be worse than the rest - there were some "I don't know how it should work, but the current code definitely cannot work." places. And while I have seen people running Linux on machines like a SPARCstation 5 a few years ago I don't recall having seen sun4 machines, even less ones running Linux. Signed-off-by: Adrian Bunk <bunk@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
		
			
				
	
	
		
			127 lines
		
	
	
	
		
			3.9 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			127 lines
		
	
	
	
		
			3.9 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
#ifndef _SPARC_VAC_OPS_H
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#define _SPARC_VAC_OPS_H
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/* vac-ops.h: Inline assembly routines to do operations on the Sparc
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 *            VAC (virtual address cache) for the sun4c.
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 *
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 * Copyright (C) 1994, David S. Miller (davem@caip.rutgers.edu)
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 */
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#include <asm/sysen.h>
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#include <asm/contregs.h>
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#include <asm/asi.h>
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/* The SUN4C models have a virtually addressed write-through
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 * cache.
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 *
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 * The cache tags are directly accessible through an ASI and
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 * each have the form:
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 *
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 * ------------------------------------------------------------
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 * | MBZ | CONTEXT | WRITE | PRIV | VALID | MBZ | TagID | MBZ |
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 * ------------------------------------------------------------
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 *  31 25  24   22     21     20     19    18 16  15   2  1  0
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 *
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 * MBZ: These bits are either unused and/or reserved and should
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 *      be written as zeroes.
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 *
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 * CONTEXT: Records the context to which this cache line belongs.
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 *
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 * WRITE: A copy of the writable bit from the mmu pte access bits.
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 *
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 * PRIV: A copy of the privileged bit from the pte access bits.
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 *
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 * VALID: If set, this line is valid, else invalid.
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 *
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 * TagID: Fourteen bits of tag ID.
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 *
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 * Every virtual address is seen by the cache like this:
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 *
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 * ----------------------------------------
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 * |  RESV  | TagID | LINE | BYTE-in-LINE |
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 * ----------------------------------------
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 *  31    30 29   16 15   4 3            0
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 *
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 * RESV: Unused/reserved.
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 *
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 * TagID: Used to match the Tag-ID in that vac tags.
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 *
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 * LINE: Which line within the cache
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 *
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 * BYTE-in-LINE: Which byte within the cache line.
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 */
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/* Sun4c VAC Tags */
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#define S4CVACTAG_CID      0x01c00000
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#define S4CVACTAG_W        0x00200000
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#define S4CVACTAG_P        0x00100000
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#define S4CVACTAG_V        0x00080000
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#define S4CVACTAG_TID      0x0000fffc
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/* Sun4c VAC Virtual Address */
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/* These aren't used, why bother? (Anton) */
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#if 0
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#define S4CVACVA_TID       0x3fff0000
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#define S4CVACVA_LINE      0x0000fff0
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#define S4CVACVA_BIL       0x0000000f
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#endif
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/* The indexing of cache lines creates a problem.  Because the line
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 * field of a virtual address extends past the page offset within
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 * the virtual address it is possible to have what are called
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 * 'bad aliases' which will create inconsistencies.  So we must make
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 * sure that within a context that if a physical page is mapped
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 * more than once, that 'extra' line bits are the same.  If this is
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 * not the case, and thus is a 'bad alias' we must turn off the
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 * cacheable bit in the pte's of all such pages.
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 */
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#define S4CVAC_BADBITS    0x0000f000
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/* The following is true if vaddr1 and vaddr2 would cause
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 * a 'bad alias'.
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 */
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#define S4CVAC_BADALIAS(vaddr1, vaddr2) \
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        ((((unsigned long) (vaddr1)) ^ ((unsigned long) (vaddr2))) & \
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	 (S4CVAC_BADBITS))
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/* The following structure describes the characteristics of a sun4c
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 * VAC as probed from the prom during boot time.
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 */
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struct sun4c_vac_props {
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	unsigned int num_bytes;     /* Size of the cache */
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	unsigned int do_hwflushes;  /* Hardware flushing available? */
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	unsigned int linesize;      /* Size of each line in bytes */
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	unsigned int log2lsize;     /* log2(linesize) */
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	unsigned int on;            /* VAC is enabled */
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};
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extern struct sun4c_vac_props sun4c_vacinfo;
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/* sun4c_enable_vac() enables the sun4c virtual address cache. */
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static inline void sun4c_enable_vac(void)
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{
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	__asm__ __volatile__("lduba [%0] %1, %%g1\n\t"
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			     "or    %%g1, %2, %%g1\n\t"
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			     "stba  %%g1, [%0] %1\n\t"
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			     : /* no outputs */
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			     : "r" ((unsigned int) AC_SENABLE),
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			     "i" (ASI_CONTROL), "i" (SENABLE_CACHE)
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			     : "g1", "memory");
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	sun4c_vacinfo.on = 1;
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}
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/* sun4c_disable_vac() disables the virtual address cache. */
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static inline void sun4c_disable_vac(void)
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{
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	__asm__ __volatile__("lduba [%0] %1, %%g1\n\t"
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			     "andn  %%g1, %2, %%g1\n\t"
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			     "stba  %%g1, [%0] %1\n\t"
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			     : /* no outputs */
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			     : "r" ((unsigned int) AC_SENABLE),
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			     "i" (ASI_CONTROL), "i" (SENABLE_CACHE)
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			     : "g1", "memory");
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	sun4c_vacinfo.on = 0;
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}
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#endif /* !(_SPARC_VAC_OPS_H) */
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