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	78eb9094ca
	
	
	
		
			
			T2080PCIe-RDB is a Freescale Reference Design Board that hosts T2080 SoC. The board feature overview: Processor: - T2080 SoC integrating four 64-bit dual-threads e6500 cores up to 1.8GHz DDR Memory: - Single memory controller capable of supporting DDR3 and DDR3-LP devices - 72bit 4GB DDR3-LP SODIMM in slot Ethernet interfaces: - Two 1Gbps RGMII ports on-board - Two 10Gbps SFP+ ports on-board - Two 10Gbps Base-T ports on-board Accelerator: - DPAA components consist of FMan, BMan, QMan, PME, DCE and SEC IFC/Local Bus - NOR: 128MB 16-bit NOR flash - NAND: 1GB 8-bit NAND flash - CPLD: for system controlling with programable header on-board eSPI: - 64MB N25Q512 SPI flash USB: - Two USB2.0 ports with internal PHY (both Type-A) PCIe: - One PCIe x4 goldfinger(support SR-IOV) - One PCIe x4 slot - One PCIe x2 end-point device (C293 crypto co-processor) SATA: - Two SATA 2.0 ports on-board SDHC: - support a MicroSD/TF card on-board I2C: - Four I2C controllers. UART: - Dual 4-pins UART serial ports Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
		
			
				
	
	
		
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| /*
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|  * T2080PCIe-RDB Board Device Tree Source
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|  *
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|  * Copyright 2014 Freescale Semiconductor Inc.
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|  *
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|  * Redistribution and use in source and binary forms, with or without
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|  * modification, are permitted provided that the following conditions are met:
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|  *     * Redistributions of source code must retain the above copyright
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|  *	 notice, this list of conditions and the following disclaimer.
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|  *     * Redistributions in binary form must reproduce the above copyright
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|  *	 notice, this list of conditions and the following disclaimer in the
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|  *	 documentation and/or other materials provided with the distribution.
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|  *     * Neither the name of Freescale Semiconductor nor the
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|  *	 names of its contributors may be used to endorse or promote products
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|  *	 derived from this software without specific prior written permission.
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|  *
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|  *
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|  * ALTERNATIVELY, this software may be distributed under the terms of the
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|  * GNU General Public License ("GPL") as published by the Free Software
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|  * Foundation, either version 2 of that License or (at your option) any
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|  * later version.
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|  *
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|  * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
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|  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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|  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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|  * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
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|  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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|  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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|  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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|  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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|  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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|  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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|  */
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| 
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| /include/ "fsl/t208xsi-pre.dtsi"
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| /include/ "t208xrdb.dtsi"
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| 
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| / {
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| 	model = "fsl,T2080RDB";
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| 	compatible = "fsl,T2080RDB";
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| 	#address-cells = <2>;
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| 	#size-cells = <2>;
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| 	interrupt-parent = <&mpic>;
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| 
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| 	rio: rapidio@ffe0c0000 {
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| 		reg = <0xf 0xfe0c0000 0 0x11000>;
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| 
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| 		port1 {
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| 			ranges = <0 0 0xc 0x20000000 0 0x10000000>;
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| 		};
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| 		port2 {
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| 			ranges = <0 0 0xc 0x30000000 0 0x10000000>;
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| 		};
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| 	};
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| };
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| 
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| /include/ "fsl/t2080si-post.dtsi"
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