98e182a26b
This removes the support for setting the wake-up timer for debugging. Later on we can reserve gptimer1 for PM code only and have similar functionality. Signed-off-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com>
137 lines
3.7 KiB
C
137 lines
3.7 KiB
C
/*
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* OMAP2/3 Power Management Routines
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*
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* Copyright (C) 2008 Nokia Corporation
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* Jouni Hogander
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ARCH_ARM_MACH_OMAP2_PM_H
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#define __ARCH_ARM_MACH_OMAP2_PM_H
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#include <linux/err.h>
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#include "powerdomain.h"
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extern void *omap3_secure_ram_storage;
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extern void omap3_pm_off_mode_enable(int);
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extern void omap_sram_idle(void);
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extern int omap3_can_sleep(void);
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extern int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state);
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extern int omap3_idle_init(void);
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#if defined(CONFIG_PM_OPP)
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extern int omap3_opp_init(void);
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extern int omap4_opp_init(void);
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#else
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static inline int omap3_opp_init(void)
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{
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return -EINVAL;
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}
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static inline int omap4_opp_init(void)
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{
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return -EINVAL;
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}
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#endif
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/*
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* cpuidle mach specific parameters
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*
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* The board code can override the default C-states definition using
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* omap3_pm_init_cpuidle
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*/
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struct cpuidle_params {
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u32 exit_latency; /* exit_latency = sleep + wake-up latencies */
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u32 target_residency;
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u8 valid; /* validates the C-state */
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};
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#if defined(CONFIG_PM) && defined(CONFIG_CPU_IDLE)
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extern void omap3_pm_init_cpuidle(struct cpuidle_params *cpuidle_board_params);
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#else
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static
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inline void omap3_pm_init_cpuidle(struct cpuidle_params *cpuidle_board_params)
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{
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}
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#endif
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extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm);
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extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state);
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#ifdef CONFIG_PM_DEBUG
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extern void omap2_pm_dump(int mode, int resume, unsigned int us);
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extern int omap2_pm_debug;
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extern u32 enable_off_mode;
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extern u32 sleep_while_idle;
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#else
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#define omap2_pm_dump(mode, resume, us) do {} while (0);
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#define omap2_pm_debug 0
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#define enable_off_mode 0
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#define sleep_while_idle 0
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#endif
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#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
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extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev);
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extern int pm_dbg_regset_save(int reg_set);
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extern int pm_dbg_regset_init(int reg_set);
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#else
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#define pm_dbg_update_time(pwrdm, prev) do {} while (0);
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#define pm_dbg_regset_save(reg_set) do {} while (0);
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#define pm_dbg_regset_init(reg_set) do {} while (0);
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#endif /* CONFIG_PM_DEBUG */
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extern void omap24xx_idle_loop_suspend(void);
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extern void omap24xx_cpu_suspend(u32 dll_ctrl, void __iomem *sdrc_dlla_ctrl,
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void __iomem *sdrc_power);
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extern void omap34xx_cpu_suspend(u32 *addr, int save_state);
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extern int save_secure_ram_context(u32 *addr);
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extern void omap3_save_scratchpad_contents(void);
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extern unsigned int omap24xx_idle_loop_suspend_sz;
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extern unsigned int save_secure_ram_context_sz;
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extern unsigned int omap24xx_cpu_suspend_sz;
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extern unsigned int omap34xx_cpu_suspend_sz;
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#define PM_RTA_ERRATUM_i608 (1 << 0)
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#define PM_SDRC_WAKEUP_ERRATUM_i583 (1 << 1)
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#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
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extern u16 pm34xx_errata;
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#define IS_PM34XX_ERRATUM(id) (pm34xx_errata & (id))
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extern void enable_omap3630_toggle_l2_on_restore(void);
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#else
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#define IS_PM34XX_ERRATUM(id) 0
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static inline void enable_omap3630_toggle_l2_on_restore(void) { }
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#endif /* defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) */
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#ifdef CONFIG_OMAP_SMARTREFLEX
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extern int omap_devinit_smartreflex(void);
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extern void omap_enable_smartreflex_on_init(void);
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#else
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static inline int omap_devinit_smartreflex(void)
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{
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return -EINVAL;
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}
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static inline void omap_enable_smartreflex_on_init(void) {}
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#endif
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#ifdef CONFIG_TWL4030_CORE
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extern int omap3_twl_init(void);
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extern int omap4_twl_init(void);
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extern int omap3_twl_set_sr_bit(bool enable);
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#else
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static inline int omap3_twl_init(void)
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{
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return -EINVAL;
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}
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static inline int omap4_twl_init(void)
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{
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return -EINVAL;
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}
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#endif
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#endif
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