The core mm code will provide a default gate area based on FIXADDR_USER_START and FIXADDR_USER_END if !defined(__HAVE_ARCH_GATE_AREA) && defined(AT_SYSINFO_EHDR). This default is only useful for ia64. arm64, ppc, s390, sh, tile, 64-bit UML, and x86_32 have their own code just to disable it. arm, 32-bit UML, and x86_64 have gate areas, but they have their own implementations. This gets rid of the default and moves the code into ia64. This should save some code on architectures without a gate area: it's now possible to inline the gate_area functions in the default case. Signed-off-by: Andy Lutomirski <luto@amacapital.net> Acked-by: Nathan Lynch <nathan_lynch@mentor.com> Acked-by: H. Peter Anvin <hpa@linux.intel.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> [in principle] Acked-by: Richard Weinberger <richard@nod.at> [for um] Acked-by: Will Deacon <will.deacon@arm.com> [for arm64] Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Tony Luck <tony.luck@intel.com> Cc: Fenghua Yu <fenghua.yu@intel.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Chris Metcalf <cmetcalf@tilera.com> Cc: Jeff Dike <jdike@addtoit.com> Cc: Richard Weinberger <richard@nod.at> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Nathan Lynch <Nathan_Lynch@mentor.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
		
			
				
	
	
		
			333 lines
		
	
	
	
		
			9.8 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			333 lines
		
	
	
	
		
			9.8 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * Copyright 2010 Tilera Corporation. All Rights Reserved.
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 *
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 *   This program is free software; you can redistribute it and/or
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 *   modify it under the terms of the GNU General Public License
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 *   as published by the Free Software Foundation, version 2.
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 *
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 *   This program is distributed in the hope that it will be useful, but
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 *   WITHOUT ANY WARRANTY; without even the implied warranty of
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 *   MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
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 *   NON INFRINGEMENT.  See the GNU General Public License for
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 *   more details.
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 */
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#ifndef _ASM_TILE_PAGE_H
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#define _ASM_TILE_PAGE_H
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#include <linux/const.h>
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#include <hv/hypervisor.h>
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#include <arch/chip.h>
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/* PAGE_SHIFT and HPAGE_SHIFT determine the page sizes. */
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#if defined(CONFIG_PAGE_SIZE_16KB)
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#define PAGE_SHIFT	14
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#define CTX_PAGE_FLAG	HV_CTX_PG_SM_16K
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#elif defined(CONFIG_PAGE_SIZE_64KB)
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#define PAGE_SHIFT	16
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#define CTX_PAGE_FLAG	HV_CTX_PG_SM_64K
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#else
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#define PAGE_SHIFT	HV_LOG2_DEFAULT_PAGE_SIZE_SMALL
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#define CTX_PAGE_FLAG	0
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#endif
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#define HPAGE_SHIFT	HV_LOG2_DEFAULT_PAGE_SIZE_LARGE
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#define PAGE_SIZE	(_AC(1, UL) << PAGE_SHIFT)
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#define HPAGE_SIZE	(_AC(1, UL) << HPAGE_SHIFT)
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#define PAGE_MASK	(~(PAGE_SIZE - 1))
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#define HPAGE_MASK	(~(HPAGE_SIZE - 1))
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/*
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 * If the Kconfig doesn't specify, set a maximum zone order that
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 * is enough so that we can create huge pages from small pages given
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 * the respective sizes of the two page types.  See <linux/mmzone.h>.
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 */
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#ifndef CONFIG_FORCE_MAX_ZONEORDER
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#define CONFIG_FORCE_MAX_ZONEORDER (HPAGE_SHIFT - PAGE_SHIFT + 1)
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#endif
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#ifndef __ASSEMBLY__
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#include <linux/types.h>
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#include <linux/string.h>
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struct page;
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static inline void clear_page(void *page)
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{
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	memset(page, 0, PAGE_SIZE);
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}
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static inline void copy_page(void *to, void *from)
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{
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	memcpy(to, from, PAGE_SIZE);
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}
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static inline void clear_user_page(void *page, unsigned long vaddr,
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				struct page *pg)
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{
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	clear_page(page);
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}
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static inline void copy_user_page(void *to, void *from, unsigned long vaddr,
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				struct page *topage)
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{
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	copy_page(to, from);
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}
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/*
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 * Hypervisor page tables are made of the same basic structure.
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 */
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typedef HV_PTE pte_t;
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typedef HV_PTE pgd_t;
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typedef HV_PTE pgprot_t;
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/*
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 * User L2 page tables are managed as one L2 page table per page,
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 * because we use the page allocator for them.  This keeps the allocation
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 * simple, but it's also inefficient, since L2 page tables are much smaller
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 * than pages (currently 2KB vs 64KB).  So we should revisit this.
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 */
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typedef struct page *pgtable_t;
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/* Must be a macro since it is used to create constants. */
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#define __pgprot(val) hv_pte(val)
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/* Rarely-used initializers, typically with a "zero" value. */
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#define __pte(x) hv_pte(x)
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#define __pgd(x) hv_pte(x)
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static inline u64 pgprot_val(pgprot_t pgprot)
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{
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	return hv_pte_val(pgprot);
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}
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static inline u64 pte_val(pte_t pte)
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{
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	return hv_pte_val(pte);
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}
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static inline u64 pgd_val(pgd_t pgd)
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{
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	return hv_pte_val(pgd);
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}
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#ifdef __tilegx__
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typedef HV_PTE pmd_t;
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#define __pmd(x) hv_pte(x)
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static inline u64 pmd_val(pmd_t pmd)
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{
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	return hv_pte_val(pmd);
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}
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#endif
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static inline __attribute_const__ int get_order(unsigned long size)
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{
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	return BITS_PER_LONG - __builtin_clzl((size - 1) >> PAGE_SHIFT);
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}
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#endif /* !__ASSEMBLY__ */
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#define HUGETLB_PAGE_ORDER	(HPAGE_SHIFT - PAGE_SHIFT)
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#define HUGE_MAX_HSTATE		6
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#ifdef CONFIG_HUGETLB_PAGE
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#define HAVE_ARCH_HUGETLB_UNMAPPED_AREA
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#endif
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/* Allow overriding how much VA or PA the kernel will use. */
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#define MAX_PA_WIDTH CHIP_PA_WIDTH()
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#define MAX_VA_WIDTH CHIP_VA_WIDTH()
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/* Each memory controller has PAs distinct in their high bits. */
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#define NR_PA_HIGHBIT_SHIFT (MAX_PA_WIDTH - CHIP_LOG_NUM_MSHIMS())
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#define NR_PA_HIGHBIT_VALUES (1 << CHIP_LOG_NUM_MSHIMS())
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#define __pa_to_highbits(pa) ((phys_addr_t)(pa) >> NR_PA_HIGHBIT_SHIFT)
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#define __pfn_to_highbits(pfn) ((pfn) >> (NR_PA_HIGHBIT_SHIFT - PAGE_SHIFT))
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#ifdef __tilegx__
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/*
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 * We reserve the lower half of memory for user-space programs, and the
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 * upper half for system code.  We re-map all of physical memory in the
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 * upper half, which takes a quarter of our VA space.  Then we have
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 * the vmalloc regions.  The supervisor code lives at the highest address,
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 * with the hypervisor above that.
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 *
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 * Loadable kernel modules are placed immediately after the static
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 * supervisor code, with each being allocated a 256MB region of
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 * address space, so we don't have to worry about the range of "jal"
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 * and other branch instructions.
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 *
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 * For now we keep life simple and just allocate one pmd (4GB) for vmalloc.
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 * Similarly, for now we don't play any struct page mapping games.
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 */
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#if MAX_PA_WIDTH + 2 > MAX_VA_WIDTH
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# error Too much PA to map with the VA available!
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#endif
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#define PAGE_OFFSET		(-(_AC(1, UL) << (MAX_VA_WIDTH - 1)))
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#define KERNEL_HIGH_VADDR	_AC(0xfffffff800000000, UL)  /* high 32GB */
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#define FIXADDR_BASE		(KERNEL_HIGH_VADDR - 0x300000000) /* 4 GB */
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#define FIXADDR_TOP		(KERNEL_HIGH_VADDR - 0x200000000) /* 4 GB */
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#define _VMALLOC_START		FIXADDR_TOP
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#define MEM_SV_START		(KERNEL_HIGH_VADDR - 0x100000000) /* 256 MB */
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#define MEM_MODULE_START	(MEM_SV_START + (256*1024*1024)) /* 256 MB */
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#define MEM_MODULE_END		(MEM_MODULE_START + (256*1024*1024))
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#else /* !__tilegx__ */
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/*
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 * A PAGE_OFFSET of 0xC0000000 means that the kernel has
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 * a virtual address space of one gigabyte, which limits the
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 * amount of physical memory you can use to about 768MB.
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 * If you want more physical memory than this then see the CONFIG_HIGHMEM
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 * option in the kernel configuration.
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 *
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 * The top 16MB chunk in the table below is unavailable to Linux.  Since
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 * the kernel interrupt vectors must live at ether 0xfe000000 or 0xfd000000
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 * (depending on whether the kernel is at PL2 or Pl1), we map all of the
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 * bottom of RAM at this address with a huge page table entry to minimize
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 * its ITLB footprint (as well as at PAGE_OFFSET).  The last architected
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 * requirement is that user interrupt vectors live at 0xfc000000, so we
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 * make that range of memory available to user processes.  The remaining
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 * regions are sized as shown; the first four addresses use the PL 1
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 * values, and after that, we show "typical" values, since the actual
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 * addresses depend on kernel #defines.
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 *
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 * MEM_HV_START                    0xfe000000
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 * MEM_SV_START  (kernel code)     0xfd000000
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 * MEM_USER_INTRPT (user vector)   0xfc000000
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 * FIX_KMAP_xxx                    0xfa000000 (via NR_CPUS * KM_TYPE_NR)
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 * PKMAP_BASE                      0xf9000000 (via LAST_PKMAP)
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 * VMALLOC_START                   0xf7000000 (via VMALLOC_RESERVE)
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 * mapped LOWMEM                   0xc0000000
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 */
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#define MEM_USER_INTRPT		_AC(0xfc000000, UL)
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#define MEM_SV_START		_AC(0xfd000000, UL)
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#define MEM_HV_START		_AC(0xfe000000, UL)
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#define INTRPT_SIZE		0x4000
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/* Tolerate page size larger than the architecture interrupt region size. */
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#if PAGE_SIZE > INTRPT_SIZE
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#undef INTRPT_SIZE
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#define INTRPT_SIZE PAGE_SIZE
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#endif
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#define KERNEL_HIGH_VADDR	MEM_USER_INTRPT
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#define FIXADDR_TOP		(KERNEL_HIGH_VADDR - PAGE_SIZE)
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#define PAGE_OFFSET		_AC(CONFIG_PAGE_OFFSET, UL)
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/* On 32-bit architectures we mix kernel modules in with other vmaps. */
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#define MEM_MODULE_START	VMALLOC_START
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#define MEM_MODULE_END		VMALLOC_END
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#endif /* __tilegx__ */
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#if !defined(__ASSEMBLY__) && !defined(VDSO_BUILD)
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#ifdef CONFIG_HIGHMEM
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/* Map kernel virtual addresses to page frames, in HPAGE_SIZE chunks. */
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extern unsigned long pbase_map[];
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extern void *vbase_map[];
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static inline unsigned long kaddr_to_pfn(const volatile void *_kaddr)
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{
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	unsigned long kaddr = (unsigned long)_kaddr;
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	return pbase_map[kaddr >> HPAGE_SHIFT] +
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		((kaddr & (HPAGE_SIZE - 1)) >> PAGE_SHIFT);
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}
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static inline void *pfn_to_kaddr(unsigned long pfn)
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{
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	return vbase_map[__pfn_to_highbits(pfn)] + (pfn << PAGE_SHIFT);
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}
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static inline phys_addr_t virt_to_phys(const volatile void *kaddr)
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{
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	unsigned long pfn = kaddr_to_pfn(kaddr);
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	return ((phys_addr_t)pfn << PAGE_SHIFT) +
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		((unsigned long)kaddr & (PAGE_SIZE-1));
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}
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static inline void *phys_to_virt(phys_addr_t paddr)
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{
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	return pfn_to_kaddr(paddr >> PAGE_SHIFT) + (paddr & (PAGE_SIZE-1));
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}
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/* With HIGHMEM, we pack PAGE_OFFSET through high_memory with all valid VAs. */
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static inline int virt_addr_valid(const volatile void *kaddr)
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{
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	extern void *high_memory;  /* copied from <linux/mm.h> */
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	return ((unsigned long)kaddr >= PAGE_OFFSET && kaddr < high_memory);
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}
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#else /* !CONFIG_HIGHMEM */
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static inline unsigned long kaddr_to_pfn(const volatile void *kaddr)
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{
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	return ((unsigned long)kaddr - PAGE_OFFSET) >> PAGE_SHIFT;
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}
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static inline void *pfn_to_kaddr(unsigned long pfn)
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{
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	return (void *)((pfn << PAGE_SHIFT) + PAGE_OFFSET);
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}
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static inline phys_addr_t virt_to_phys(const volatile void *kaddr)
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{
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	return (phys_addr_t)((unsigned long)kaddr - PAGE_OFFSET);
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}
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static inline void *phys_to_virt(phys_addr_t paddr)
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{
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	return (void *)((unsigned long)paddr + PAGE_OFFSET);
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}
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/* Check that the given address is within some mapped range of PAs. */
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#define virt_addr_valid(kaddr) pfn_valid(kaddr_to_pfn(kaddr))
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#endif /* !CONFIG_HIGHMEM */
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/* All callers are not consistent in how they call these functions. */
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#define __pa(kaddr) virt_to_phys((void *)(unsigned long)(kaddr))
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#define __va(paddr) phys_to_virt((phys_addr_t)(paddr))
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extern int devmem_is_allowed(unsigned long pagenr);
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#ifdef CONFIG_FLATMEM
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static inline int pfn_valid(unsigned long pfn)
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{
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	return pfn < max_mapnr;
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}
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#endif
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/* Provide as macros since these require some other headers included. */
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#define page_to_pa(page) ((phys_addr_t)(page_to_pfn(page)) << PAGE_SHIFT)
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#define virt_to_page(kaddr) pfn_to_page(kaddr_to_pfn((void *)(kaddr)))
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#define page_to_virt(page) pfn_to_kaddr(page_to_pfn(page))
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struct mm_struct;
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extern pte_t *virt_to_pte(struct mm_struct *mm, unsigned long addr);
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extern pte_t *virt_to_kpte(unsigned long kaddr);
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#endif /* !__ASSEMBLY__ */
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#define VM_DATA_DEFAULT_FLAGS \
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	(VM_READ | VM_WRITE | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
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#include <asm-generic/memory_model.h>
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#endif /* _ASM_TILE_PAGE_H */
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