10ca132c41
The 82599 virtual function device and the master 82599 physical function device implement a mailbox utility for communication between the devices using some SRAM scratch memory and a doorbell/answering mechanism enabled via interrupt and/or polling. This C module and accompanying header file implement the base functions for use of this feature. Signed-off-by: Greg Rose <gregory.v.rose@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
96 lines
4.3 KiB
C
96 lines
4.3 KiB
C
/*******************************************************************************
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Intel 10 Gigabit PCI Express Linux driver
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Copyright(c) 1999 - 2009 Intel Corporation.
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This program is free software; you can redistribute it and/or modify it
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under the terms and conditions of the GNU General Public License,
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version 2, as published by the Free Software Foundation.
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This program is distributed in the hope it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details.
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You should have received a copy of the GNU General Public License along with
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this program; if not, write to the Free Software Foundation, Inc.,
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51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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The full GNU General Public License is included in this distribution in
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the file called "COPYING".
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Contact Information:
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e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
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Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
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*******************************************************************************/
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#ifndef _IXGBE_MBX_H_
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#define _IXGBE_MBX_H_
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#include "ixgbe_type.h"
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#define IXGBE_VFMAILBOX_SIZE 16 /* 16 32 bit words - 64 bytes */
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#define IXGBE_ERR_MBX -100
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#define IXGBE_VFMAILBOX 0x002FC
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#define IXGBE_VFMBMEM 0x00200
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#define IXGBE_PFMAILBOX(x) (0x04B00 + (4 * x))
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#define IXGBE_PFMBMEM(vfn) (0x13000 + (64 * vfn))
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#define IXGBE_PFMAILBOX_STS 0x00000001 /* Initiate message send to VF */
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#define IXGBE_PFMAILBOX_ACK 0x00000002 /* Ack message recv'd from VF */
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#define IXGBE_PFMAILBOX_VFU 0x00000004 /* VF owns the mailbox buffer */
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#define IXGBE_PFMAILBOX_PFU 0x00000008 /* PF owns the mailbox buffer */
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#define IXGBE_PFMAILBOX_RVFU 0x00000010 /* Reset VFU - used when VF stuck */
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#define IXGBE_MBVFICR_VFREQ_MASK 0x0000FFFF /* bits for VF messages */
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#define IXGBE_MBVFICR_VFREQ_VF1 0x00000001 /* bit for VF 1 message */
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#define IXGBE_MBVFICR_VFACK_MASK 0xFFFF0000 /* bits for VF acks */
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#define IXGBE_MBVFICR_VFACK_VF1 0x00010000 /* bit for VF 1 ack */
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/* If it's a IXGBE_VF_* msg then it originates in the VF and is sent to the
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* PF. The reverse is true if it is IXGBE_PF_*.
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* Message ACK's are the value or'd with 0xF0000000
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*/
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#define IXGBE_VT_MSGTYPE_ACK 0x80000000 /* Messages below or'd with
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* this are the ACK */
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#define IXGBE_VT_MSGTYPE_NACK 0x40000000 /* Messages below or'd with
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* this are the NACK */
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#define IXGBE_VT_MSGTYPE_CTS 0x20000000 /* Indicates that VF is still
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clear to send requests */
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#define IXGBE_VT_MSGINFO_SHIFT 16
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/* bits 23:16 are used for exra info for certain messages */
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#define IXGBE_VT_MSGINFO_MASK (0xFF << IXGBE_VT_MSGINFO_SHIFT)
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#define IXGBE_VF_RESET 0x01 /* VF requests reset */
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#define IXGBE_VF_SET_MAC_ADDR 0x02 /* VF requests PF to set MAC addr */
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#define IXGBE_VF_SET_MULTICAST 0x03 /* VF requests PF to set MC addr */
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#define IXGBE_VF_SET_VLAN 0x04 /* VF requests PF to set VLAN */
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#define IXGBE_VF_SET_LPE 0x05 /* VF requests PF to set VMOLR.LPE */
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/* length of permanent address message returned from PF */
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#define IXGBE_VF_PERMADDR_MSG_LEN 4
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/* word in permanent address message with the current multicast type */
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#define IXGBE_VF_MC_TYPE_WORD 3
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#define IXGBE_PF_CONTROL_MSG 0x0100 /* PF control message */
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#define IXGBE_VF_MBX_INIT_TIMEOUT 2000 /* number of retries on mailbox */
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#define IXGBE_VF_MBX_INIT_DELAY 500 /* microseconds between retries */
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s32 ixgbe_read_mbx(struct ixgbe_hw *, u32 *, u16, u16);
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s32 ixgbe_write_mbx(struct ixgbe_hw *, u32 *, u16, u16);
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s32 ixgbe_read_posted_mbx(struct ixgbe_hw *, u32 *, u16, u16);
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s32 ixgbe_write_posted_mbx(struct ixgbe_hw *, u32 *, u16, u16);
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s32 ixgbe_check_for_msg(struct ixgbe_hw *, u16);
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s32 ixgbe_check_for_ack(struct ixgbe_hw *, u16);
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s32 ixgbe_check_for_rst(struct ixgbe_hw *, u16);
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void ixgbe_init_mbx_ops_generic(struct ixgbe_hw *hw);
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void ixgbe_init_mbx_params_pf(struct ixgbe_hw *);
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extern struct ixgbe_mbx_operations mbx_ops_82599;
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#endif /* _IXGBE_MBX_H_ */
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