6ab3d5624e
Signed-off-by: Jörn Engel <joern@wohnheim.fh-wedel.de> Signed-off-by: Adrian Bunk <bunk@stusta.de>
128 lines
2 KiB
ArmAsm
128 lines
2 KiB
ArmAsm
/*
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* linux/arch/h8300/platform/h8s/generic/crt0_rom.S
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*
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* Yoshinori Sato <ysato@users.sourceforge.jp>
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*
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* Platform depend startup
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* Target Archtecture: generic
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* Memory Layout : ROM
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*/
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#define ASSEMBLY
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#include <asm/linkage.h>
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#include <asm/regs267x.h>
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.global SYMBOL_NAME(_start)
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.global SYMBOL_NAME(_command_line)
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.global SYMBOL_NAME(_platform_gpio_table)
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.global SYMBOL_NAME(_target_name)
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.h8300s
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.section .text
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.file "crt0_rom.S"
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/* CPU Reset entry */
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SYMBOL_NAME_LABEL(_start)
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mov.l #__ramend,sp
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ldc #0x80,ccr
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ldc #0,exr
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bclr #4,@INTCR:8
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bset #5,@INTCR:8 /* Interrupt mode 2 */
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/* Peripheral Setup */
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/* copy .data */
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#if !defined(CONFIG_H8S_SIM)
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mov.l #__begin_data,er5
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mov.l #__sdata,er6
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mov.l #__edata,er4
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sub.l er6,er4
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shlr.l #2,er4
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1:
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mov.l @er5+,er0
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mov.l er0,@er6
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adds #4,er6
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dec.l #1,er4
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bne 1b
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#endif
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/* .bss clear */
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mov.l #__sbss,er5
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mov.l #__ebss,er4
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sub.l er5,er4
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shlr.l #2,er4
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sub.l er0,er0
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1:
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mov.l er0,@er5
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adds #4,er5
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dec.l #1,er4
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bne 1b
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/* linux kernel start */
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ldc #0x90,ccr /* running kernel */
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mov.l #SYMBOL_NAME(init_thread_union),sp
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add.l #0x2000,sp
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jsr @_start_kernel
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_exit:
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jmp _exit
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rts
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/* I/O port assign information */
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__platform_gpio_table:
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mov.l #gpio_table,er0
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rts
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gpio_table:
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;; P1DDR
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.byte 0x00,0x00
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;; P2DDR
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.byte 0x00,0x00
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;; P3DDR
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.byte 0x00,0x00
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;; P4DDR
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.byte 0x00,0x00
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;; P5DDR
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.byte 0x00,0x00
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;; P6DDR
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.byte 0x00,0x00
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;; dummy
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.byte 0x00,0x00
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;; P8DDR
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.byte 0x00,0x00
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;; PADDR
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.byte 0x00,0x00
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;; PBDDR
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.byte 0x00,0x00
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;; PCDDR
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.byte 0x00,0x00
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;; PDDDR
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.byte 0x00,0x00
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;; PEDDR
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.byte 0x00,0x00
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;; PFDDR
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.byte 0x00,0x00
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;; PGDDR
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.byte 0x00,0x00
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;; PHDDR
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.byte 0x00,0x00
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.section .rodata
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__target_name:
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.asciz "generic"
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.section .bss
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__command_line:
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.space 512
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/* interrupt vector */
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.section .vectors,"ax"
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.long __start
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.long __start
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vector = 2
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.rept 126-1
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.long _interrupt_redirect_table+vector*4
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vector = vector + 1
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.endr
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