 ed618aff8a
			
		
	
	
	ed618aff8a
	
	
	
		
			
			Move IRQ support to mach-s3c64xx as it is unlikely to be re-used outside this machine. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
		
			
				
	
	
		
			69 lines
		
	
	
	
		
			1.7 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			69 lines
		
	
	
	
		
			1.7 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
| /* arch/arm/plat-s3c64xx/irq.c
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|  *
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|  * Copyright 2008 Openmoko, Inc.
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|  * Copyright 2008 Simtec Electronics
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|  *      Ben Dooks <ben@simtec.co.uk>
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|  *      http://armlinux.simtec.co.uk/
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|  *
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|  * S3C64XX - Interrupt handling
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|  *
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|  * This program is free software; you can redistribute it and/or modify
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|  * it under the terms of the GNU General Public License version 2 as
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|  * published by the Free Software Foundation.
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|  */
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| 
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| #include <linux/kernel.h>
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| #include <linux/interrupt.h>
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| #include <linux/serial_core.h>
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| #include <linux/irq.h>
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| #include <linux/io.h>
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| 
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| #include <asm/hardware/vic.h>
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| 
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| #include <mach/map.h>
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| #include <plat/irq-vic-timer.h>
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| #include <plat/irq-uart.h>
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| #include <plat/cpu.h>
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| 
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| static struct s3c_uart_irq uart_irqs[] = {
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| 	[0] = {
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| 		.regs		= S3C_VA_UART0,
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| 		.base_irq	= IRQ_S3CUART_BASE0,
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| 		.parent_irq	= IRQ_UART0,
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| 	},
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| 	[1] = {
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| 		.regs		= S3C_VA_UART1,
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| 		.base_irq	= IRQ_S3CUART_BASE1,
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| 		.parent_irq	= IRQ_UART1,
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| 	},
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| 	[2] = {
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| 		.regs		= S3C_VA_UART2,
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| 		.base_irq	= IRQ_S3CUART_BASE2,
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| 		.parent_irq	= IRQ_UART2,
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| 	},
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| 	[3] = {
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| 		.regs		= S3C_VA_UART3,
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| 		.base_irq	= IRQ_S3CUART_BASE3,
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| 		.parent_irq	= IRQ_UART3,
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| 	},
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| };
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| 
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| 
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| void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid)
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| {
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| 	printk(KERN_DEBUG "%s: initialising interrupts\n", __func__);
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| 
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| 	/* initialise the pair of VICs */
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| 	vic_init(VA_VIC0, IRQ_VIC0_BASE, vic0_valid, 0);
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| 	vic_init(VA_VIC1, IRQ_VIC1_BASE, vic1_valid, 0);
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| 
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| 	/* add the timer sub-irqs */
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| 
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| 	s3c_init_vic_timer_irq(IRQ_TIMER0_VIC, IRQ_TIMER0);
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| 	s3c_init_vic_timer_irq(IRQ_TIMER1_VIC, IRQ_TIMER1);
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| 	s3c_init_vic_timer_irq(IRQ_TIMER2_VIC, IRQ_TIMER2);
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| 	s3c_init_vic_timer_irq(IRQ_TIMER3_VIC, IRQ_TIMER3);
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| 	s3c_init_vic_timer_irq(IRQ_TIMER4_VIC, IRQ_TIMER4);
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| 
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| 	s3c_init_uart_irqs(uart_irqs, ARRAY_SIZE(uart_irqs));
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| }
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