0e51793e16
Pull ARM updates from Russell King:
"This is the first chunk of ARM updates for this merge window.
Conflicts are expected in two files - asm/timex.h and
mach-integrator/integrator_cp.c. Nothing particularly stands out more
than anything else.
Most of the growth is down to the opcodes stuff from Dave Martin,
which is countered by Rob's patches to use more of the asm-generic
headers on ARM."
(A few more conflicts grew since then, but it all looked fairly trivial)
* 'for-linus' of git://git.linaro.org/people/rmk/linux-arm: (44 commits)
ARM: 7548/1: include linux/sched.h in syscall.h
ARM: 7541/1: Add ARM ERRATA 775420 workaround
ARM: ensure vm_struct has its phys_addr member filled in
ARM: 7540/1: kexec: Check segment memory addresses
ARM: 7539/1: kexec: scan for dtb magic in segments
ARM: 7538/1: delay: add registration mechanism for delay timer sources
ARM: 7536/1: smp: Formalize an IPI for wakeup
ARM: 7525/1: ptrace: use updated syscall number for syscall auditing
ARM: 7524/1: support syscall tracing
ARM: 7519/1: integrator: convert platform devices to Device Tree
ARM: 7518/1: integrator: convert AMBA devices to device tree
ARM: 7517/1: integrator: initial device tree support
ARM: 7516/1: plat-versatile: add DT support to FPGA IRQ
ARM: 7515/1: integrator: check PL010 base address from resource
ARM: 7514/1: integrator: call common init function from machine
ARM: 7522/1: arch_timers: register a time/cycle counter
ARM: 7523/1: arch_timers: enable the use of the virtual timer
ARM: 7531/1: mark kernelmode mem{cpy,set} non-experimental
ARM: 7520/1: Build dtb files in all target
ARM: Fix build warning in arch/arm/mm/alignment.c
...
171 lines
4 KiB
C
171 lines
4 KiB
C
/*
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* linux/arch/arm/mach-integrator/core.c
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*
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* Copyright (C) 2000-2003 Deep Blue Solutions Ltd
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2, as
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* published by the Free Software Foundation.
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*/
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/device.h>
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#include <linux/export.h>
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#include <linux/spinlock.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/memblock.h>
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#include <linux/sched.h>
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#include <linux/smp.h>
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#include <linux/termios.h>
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#include <linux/amba/bus.h>
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#include <linux/amba/serial.h>
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#include <linux/io.h>
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#include <mach/hardware.h>
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#include <mach/platform.h>
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#include <mach/cm.h>
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#include <mach/irqs.h>
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#include <asm/mach-types.h>
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#include <asm/mach/time.h>
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#include <asm/pgtable.h>
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#include "common.h"
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#ifdef CONFIG_ATAGS
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#define INTEGRATOR_RTC_IRQ { IRQ_RTCINT }
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#define INTEGRATOR_UART0_IRQ { IRQ_UARTINT0 }
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#define INTEGRATOR_UART1_IRQ { IRQ_UARTINT1 }
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#define KMI0_IRQ { IRQ_KMIINT0 }
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#define KMI1_IRQ { IRQ_KMIINT1 }
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static AMBA_APB_DEVICE(rtc, "rtc", 0,
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INTEGRATOR_RTC_BASE, INTEGRATOR_RTC_IRQ, NULL);
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static AMBA_APB_DEVICE(uart0, "uart0", 0,
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INTEGRATOR_UART0_BASE, INTEGRATOR_UART0_IRQ, &integrator_uart_data);
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static AMBA_APB_DEVICE(uart1, "uart1", 0,
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INTEGRATOR_UART1_BASE, INTEGRATOR_UART1_IRQ, &integrator_uart_data);
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static AMBA_APB_DEVICE(kmi0, "kmi0", 0, KMI0_BASE, KMI0_IRQ, NULL);
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static AMBA_APB_DEVICE(kmi1, "kmi1", 0, KMI1_BASE, KMI1_IRQ, NULL);
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static struct amba_device *amba_devs[] __initdata = {
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&rtc_device,
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&uart0_device,
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&uart1_device,
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&kmi0_device,
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&kmi1_device,
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};
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int __init integrator_init(bool is_cp)
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{
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int i;
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/*
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* The Integrator/AP lacks necessary AMBA PrimeCell IDs, so we need to
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* hard-code them. The Integator/CP and forward have proper cell IDs.
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* Else we leave them undefined to the bus driver can autoprobe them.
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*/
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if (!is_cp) {
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rtc_device.periphid = 0x00041030;
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uart0_device.periphid = 0x00041010;
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uart1_device.periphid = 0x00041010;
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kmi0_device.periphid = 0x00041050;
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kmi1_device.periphid = 0x00041050;
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}
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for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
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struct amba_device *d = amba_devs[i];
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amba_device_register(d, &iomem_resource);
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}
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return 0;
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}
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#endif
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/*
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* On the Integrator platform, the port RTS and DTR are provided by
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* bits in the following SC_CTRLS register bits:
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* RTS DTR
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* UART0 7 6
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* UART1 5 4
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*/
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#define SC_CTRLC __io_address(INTEGRATOR_SC_CTRLC)
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#define SC_CTRLS __io_address(INTEGRATOR_SC_CTRLS)
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static void integrator_uart_set_mctrl(struct amba_device *dev, void __iomem *base, unsigned int mctrl)
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{
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unsigned int ctrls = 0, ctrlc = 0, rts_mask, dtr_mask;
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u32 phybase = dev->res.start;
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if (phybase == INTEGRATOR_UART0_BASE) {
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/* UART0 */
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rts_mask = 1 << 4;
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dtr_mask = 1 << 5;
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} else {
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/* UART1 */
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rts_mask = 1 << 6;
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dtr_mask = 1 << 7;
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}
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if (mctrl & TIOCM_RTS)
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ctrlc |= rts_mask;
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else
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ctrls |= rts_mask;
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if (mctrl & TIOCM_DTR)
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ctrlc |= dtr_mask;
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else
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ctrls |= dtr_mask;
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__raw_writel(ctrls, SC_CTRLS);
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__raw_writel(ctrlc, SC_CTRLC);
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}
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struct amba_pl010_data integrator_uart_data = {
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.set_mctrl = integrator_uart_set_mctrl,
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};
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static DEFINE_RAW_SPINLOCK(cm_lock);
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/**
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* cm_control - update the CM_CTRL register.
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* @mask: bits to change
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* @set: bits to set
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*/
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void cm_control(u32 mask, u32 set)
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{
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unsigned long flags;
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u32 val;
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raw_spin_lock_irqsave(&cm_lock, flags);
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val = readl(CM_CTRL) & ~mask;
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writel(val | set, CM_CTRL);
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raw_spin_unlock_irqrestore(&cm_lock, flags);
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}
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EXPORT_SYMBOL(cm_control);
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/*
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* We need to stop things allocating the low memory; ideally we need a
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* better implementation of GFP_DMA which does not assume that DMA-able
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* memory starts at zero.
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*/
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void __init integrator_reserve(void)
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{
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memblock_reserve(PHYS_OFFSET, __pa(swapper_pg_dir) - PHYS_OFFSET);
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}
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/*
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* To reset, we hit the on-board reset register in the system FPGA
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*/
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void integrator_restart(char mode, const char *cmd)
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{
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cm_control(CM_CTRL_RESET, CM_CTRL_RESET);
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}
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