Now that the only field in struct sys_timer is .init, delete the struct, and replace the machine descriptor .timer field with the initialization function itself. This will enable moving timer drivers into drivers/clocksource without having to place a public prototype of each struct sys_timer object into include/linux; the intent is to create a single of_clocksource_init() function that determines which timer driver to initialize by scanning the device dtree, much like the proposed irqchip_init() at: http://www.spinics.net/lists/arm-kernel/msg203686.html Includes mach-omap2 fixes from Igor Grinberg. Tested-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Stephen Warren <swarren@nvidia.com>
		
			
				
	
	
		
			428 lines
		
	
	
	
		
			10 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			428 lines
		
	
	
	
		
			10 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
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 * Copyright (C) 2009 Sascha Hauer (kernel@pengutronix.de)
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 *
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 * This program is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU General Public License
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 * as published by the Free Software Foundation; either version 2
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 * of the License, or (at your option) any later version.
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 * This program is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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						|
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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						|
 * GNU General Public License for more details.
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 *
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 * You should have received a copy of the GNU General Public License
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						|
 * along with this program; if not, write to the Free Software
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						|
 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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 * MA 02110-1301, USA.
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 */
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <linux/i2c.h>
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#include <linux/i2c/at24.h>
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#include <linux/dma-mapping.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/eeprom.h>
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#include <linux/irq.h>
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#include <linux/delay.h>
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#include <linux/gpio.h>
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#include <linux/usb/otg.h>
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#include <linux/usb/ulpi.h>
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#include <asm/mach/arch.h>
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#include <asm/mach-types.h>
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#include <asm/mach/time.h>
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#include "common.h"
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#include "devices-imx27.h"
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#include "hardware.h"
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#include "iomux-mx27.h"
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#include "ulpi.h"
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#define OTG_PHY_CS_GPIO (GPIO_PORTB + 23)
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#define USBH2_PHY_CS_GPIO (GPIO_PORTB + 24)
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#define SPI1_SS0 (GPIO_PORTD + 28)
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#define SPI1_SS1 (GPIO_PORTD + 27)
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#define SD2_CD (GPIO_PORTC + 29)
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static const int pca100_pins[] __initconst = {
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	/* UART1 */
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	PE12_PF_UART1_TXD,
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	PE13_PF_UART1_RXD,
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	PE14_PF_UART1_CTS,
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	PE15_PF_UART1_RTS,
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	/* SDHC */
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	PB4_PF_SD2_D0,
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	PB5_PF_SD2_D1,
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	PB6_PF_SD2_D2,
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	PB7_PF_SD2_D3,
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	PB8_PF_SD2_CMD,
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	PB9_PF_SD2_CLK,
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	SD2_CD | GPIO_GPIO | GPIO_IN,
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	/* FEC */
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	PD0_AIN_FEC_TXD0,
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	PD1_AIN_FEC_TXD1,
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	PD2_AIN_FEC_TXD2,
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	PD3_AIN_FEC_TXD3,
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	PD4_AOUT_FEC_RX_ER,
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	PD5_AOUT_FEC_RXD1,
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	PD6_AOUT_FEC_RXD2,
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	PD7_AOUT_FEC_RXD3,
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	PD8_AF_FEC_MDIO,
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	PD9_AIN_FEC_MDC,
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	PD10_AOUT_FEC_CRS,
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	PD11_AOUT_FEC_TX_CLK,
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	PD12_AOUT_FEC_RXD0,
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	PD13_AOUT_FEC_RX_DV,
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	PD14_AOUT_FEC_RX_CLK,
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	PD15_AOUT_FEC_COL,
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	PD16_AIN_FEC_TX_ER,
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	PF23_AIN_FEC_TX_EN,
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	/* SSI1 */
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	PC20_PF_SSI1_FS,
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	PC21_PF_SSI1_RXD,
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	PC22_PF_SSI1_TXD,
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	PC23_PF_SSI1_CLK,
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	/* onboard I2C */
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	PC5_PF_I2C2_SDA,
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	PC6_PF_I2C2_SCL,
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	/* external I2C */
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	PD17_PF_I2C_DATA,
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	PD18_PF_I2C_CLK,
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	/* SPI1 */
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	PD25_PF_CSPI1_RDY,
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	PD29_PF_CSPI1_SCLK,
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	PD30_PF_CSPI1_MISO,
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	PD31_PF_CSPI1_MOSI,
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	/* OTG */
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	OTG_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT,
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	PC7_PF_USBOTG_DATA5,
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	PC8_PF_USBOTG_DATA6,
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	PC9_PF_USBOTG_DATA0,
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	PC10_PF_USBOTG_DATA2,
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	PC11_PF_USBOTG_DATA1,
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	PC12_PF_USBOTG_DATA4,
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	PC13_PF_USBOTG_DATA3,
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	PE0_PF_USBOTG_NXT,
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	PE1_PF_USBOTG_STP,
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	PE2_PF_USBOTG_DIR,
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	PE24_PF_USBOTG_CLK,
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	PE25_PF_USBOTG_DATA7,
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	/* USBH2 */
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	USBH2_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT,
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	PA0_PF_USBH2_CLK,
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	PA1_PF_USBH2_DIR,
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	PA2_PF_USBH2_DATA7,
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	PA3_PF_USBH2_NXT,
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	PA4_PF_USBH2_STP,
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	PD19_AF_USBH2_DATA4,
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	PD20_AF_USBH2_DATA3,
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	PD21_AF_USBH2_DATA6,
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	PD22_AF_USBH2_DATA0,
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	PD23_AF_USBH2_DATA2,
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	PD24_AF_USBH2_DATA1,
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	PD26_AF_USBH2_DATA5,
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	/* display */
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	PA5_PF_LSCLK,
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	PA6_PF_LD0,
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	PA7_PF_LD1,
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	PA8_PF_LD2,
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	PA9_PF_LD3,
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	PA10_PF_LD4,
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	PA11_PF_LD5,
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	PA12_PF_LD6,
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	PA13_PF_LD7,
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	PA14_PF_LD8,
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	PA15_PF_LD9,
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	PA16_PF_LD10,
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	PA17_PF_LD11,
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	PA18_PF_LD12,
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	PA19_PF_LD13,
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	PA20_PF_LD14,
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	PA21_PF_LD15,
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	PA22_PF_LD16,
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	PA23_PF_LD17,
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	PA26_PF_PS,
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	PA28_PF_HSYNC,
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	PA29_PF_VSYNC,
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	PA31_PF_OE_ACD,
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	/* free GPIO */
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	GPIO_PORTC | 31 | GPIO_GPIO | GPIO_IN, /* GPIO0_IRQ */
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	GPIO_PORTC | 25 | GPIO_GPIO | GPIO_IN, /* GPIO1_IRQ */
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	GPIO_PORTE | 5 | GPIO_GPIO | GPIO_IN, /* GPIO2_IRQ */
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};
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static const struct imxuart_platform_data uart_pdata __initconst = {
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	.flags = IMXUART_HAVE_RTSCTS,
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};
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static const struct mxc_nand_platform_data
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pca100_nand_board_info __initconst = {
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	.width = 1,
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	.hw_ecc = 1,
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};
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static const struct imxi2c_platform_data pca100_i2c1_data __initconst = {
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	.bitrate = 100000,
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};
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static struct at24_platform_data board_eeprom = {
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	.byte_len = 4096,
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	.page_size = 32,
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	.flags = AT24_FLAG_ADDR16,
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};
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static struct i2c_board_info pca100_i2c_devices[] = {
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	{
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		I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */
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		.platform_data = &board_eeprom,
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	}, {
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		I2C_BOARD_INFO("pcf8563", 0x51),
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	}, {
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		I2C_BOARD_INFO("lm75", 0x4a),
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	}
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};
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static struct spi_eeprom at25320 = {
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	.name		= "at25320an",
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	.byte_len	= 4096,
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	.page_size	= 32,
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	.flags		= EE_ADDR2,
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};
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static struct spi_board_info pca100_spi_board_info[] __initdata = {
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	{
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		.modalias = "at25",
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		.max_speed_hz = 30000,
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		.bus_num = 0,
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		.chip_select = 1,
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		.platform_data = &at25320,
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	},
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};
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static int pca100_spi_cs[] = {SPI1_SS0, SPI1_SS1};
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static const struct spi_imx_master pca100_spi0_data __initconst = {
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	.chipselect	= pca100_spi_cs,
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	.num_chipselect = ARRAY_SIZE(pca100_spi_cs),
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};
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static void pca100_ac97_warm_reset(struct snd_ac97 *ac97)
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{
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	mxc_gpio_mode(GPIO_PORTC | 20 | GPIO_GPIO | GPIO_OUT);
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	gpio_set_value(GPIO_PORTC + 20, 1);
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	udelay(2);
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	gpio_set_value(GPIO_PORTC + 20, 0);
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	mxc_gpio_mode(PC20_PF_SSI1_FS);
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	msleep(2);
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}
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static void pca100_ac97_cold_reset(struct snd_ac97 *ac97)
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{
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	mxc_gpio_mode(GPIO_PORTC | 20 | GPIO_GPIO | GPIO_OUT);  /* FS */
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	gpio_set_value(GPIO_PORTC + 20, 0);
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	mxc_gpio_mode(GPIO_PORTC | 22 | GPIO_GPIO | GPIO_OUT);  /* TX */
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	gpio_set_value(GPIO_PORTC + 22, 0);
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	mxc_gpio_mode(GPIO_PORTC | 28 | GPIO_GPIO | GPIO_OUT);  /* reset */
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	gpio_set_value(GPIO_PORTC + 28, 0);
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	udelay(10);
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	gpio_set_value(GPIO_PORTC + 28, 1);
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	mxc_gpio_mode(PC20_PF_SSI1_FS);
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	mxc_gpio_mode(PC22_PF_SSI1_TXD);
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	msleep(2);
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}
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static const struct imx_ssi_platform_data pca100_ssi_pdata __initconst = {
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	.ac97_reset		= pca100_ac97_cold_reset,
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	.ac97_warm_reset	= pca100_ac97_warm_reset,
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	.flags			= IMX_SSI_USE_AC97,
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};
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static int pca100_sdhc2_init(struct device *dev, irq_handler_t detect_irq,
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		void *data)
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{
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	int ret;
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	ret = request_irq(gpio_to_irq(IMX_GPIO_NR(3, 29)), detect_irq,
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			  IRQF_DISABLED | IRQF_TRIGGER_FALLING,
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			  "imx-mmc-detect", data);
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	if (ret)
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		printk(KERN_ERR
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			"pca100: Failed to reuest irq for sd/mmc detection\n");
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	return ret;
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}
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static void pca100_sdhc2_exit(struct device *dev, void *data)
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{
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	free_irq(gpio_to_irq(IMX_GPIO_NR(3, 29)), data);
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}
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static const struct imxmmc_platform_data sdhc_pdata __initconst = {
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	.init = pca100_sdhc2_init,
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	.exit = pca100_sdhc2_exit,
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};
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static int otg_phy_init(struct platform_device *pdev)
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{
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	gpio_set_value(OTG_PHY_CS_GPIO, 0);
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	mdelay(10);
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	return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI);
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}
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static struct mxc_usbh_platform_data otg_pdata __initdata = {
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	.init	= otg_phy_init,
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	.portsc	= MXC_EHCI_MODE_ULPI,
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};
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static int usbh2_phy_init(struct platform_device *pdev)
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{
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	gpio_set_value(USBH2_PHY_CS_GPIO, 0);
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	mdelay(10);
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	return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI);
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}
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static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
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	.init	= usbh2_phy_init,
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	.portsc	= MXC_EHCI_MODE_ULPI,
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};
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static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {
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	.operating_mode = FSL_USB2_DR_DEVICE,
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	.phy_mode       = FSL_USB2_PHY_ULPI,
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};
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static bool otg_mode_host __initdata;
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static int __init pca100_otg_mode(char *options)
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{
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	if (!strcmp(options, "host"))
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		otg_mode_host = true;
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	else if (!strcmp(options, "device"))
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		otg_mode_host = false;
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	else
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		pr_info("otg_mode neither \"host\" nor \"device\". "
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			"Defaulting to device\n");
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	return 1;
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}
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__setup("otg_mode=", pca100_otg_mode);
 | 
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 | 
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/* framebuffer info */
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static struct imx_fb_videomode pca100_fb_modes[] = {
 | 
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	{
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		.mode = {
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			.name		= "EMERGING-ETV570G0DHU",
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			.refresh	= 60,
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			.xres		= 640,
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			.yres		= 480,
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			.pixclock	= 39722, /* in ps (25.175 MHz) */
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			.hsync_len	= 30,
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			.left_margin	= 114,
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			.right_margin	= 16,
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			.vsync_len	= 3,
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			.upper_margin	= 32,
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			.lower_margin	= 0,
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		},
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		/*
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		 * TFT
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		 * Pixel pol active high
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		 * HSYNC active low
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		 * VSYNC active low
 | 
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		 * use HSYNC for ACD count
 | 
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		 * line clock disable while idle
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		 * always enable line clock even if no data
 | 
						|
		 */
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		.pcr = 0xf0c08080,
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		.bpp = 16,
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	},
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};
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static const struct imx_fb_platform_data pca100_fb_data __initconst = {
 | 
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	.mode = pca100_fb_modes,
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	.num_modes = ARRAY_SIZE(pca100_fb_modes),
 | 
						|
 | 
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	.pwmr		= 0x00A903FF,
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	.lscr1		= 0x00120300,
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	.dmacr		= 0x00020010,
 | 
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};
 | 
						|
 | 
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static void __init pca100_init(void)
 | 
						|
{
 | 
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	int ret;
 | 
						|
 | 
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	imx27_soc_init();
 | 
						|
 | 
						|
	ret = mxc_gpio_setup_multiple_pins(pca100_pins,
 | 
						|
			ARRAY_SIZE(pca100_pins), "PCA100");
 | 
						|
	if (ret)
 | 
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		printk(KERN_ERR "pca100: Failed to setup pins (%d)\n", ret);
 | 
						|
 | 
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	imx27_add_imx_ssi(0, &pca100_ssi_pdata);
 | 
						|
 | 
						|
	imx27_add_imx_uart0(&uart_pdata);
 | 
						|
 | 
						|
	imx27_add_mxc_mmc(1, &sdhc_pdata);
 | 
						|
 | 
						|
	imx27_add_mxc_nand(&pca100_nand_board_info);
 | 
						|
 | 
						|
	/* only the i2c master 1 is used on this CPU card */
 | 
						|
	i2c_register_board_info(1, pca100_i2c_devices,
 | 
						|
				ARRAY_SIZE(pca100_i2c_devices));
 | 
						|
 | 
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	imx27_add_imx_i2c(1, &pca100_i2c1_data);
 | 
						|
 | 
						|
	mxc_gpio_mode(GPIO_PORTD | 28 | GPIO_GPIO | GPIO_IN);
 | 
						|
	mxc_gpio_mode(GPIO_PORTD | 27 | GPIO_GPIO | GPIO_IN);
 | 
						|
	spi_register_board_info(pca100_spi_board_info,
 | 
						|
				ARRAY_SIZE(pca100_spi_board_info));
 | 
						|
	imx27_add_spi_imx0(&pca100_spi0_data);
 | 
						|
 | 
						|
	gpio_request(OTG_PHY_CS_GPIO, "usb-otg-cs");
 | 
						|
	gpio_direction_output(OTG_PHY_CS_GPIO, 1);
 | 
						|
	gpio_request(USBH2_PHY_CS_GPIO, "usb-host2-cs");
 | 
						|
	gpio_direction_output(USBH2_PHY_CS_GPIO, 1);
 | 
						|
 | 
						|
	if (otg_mode_host) {
 | 
						|
		otg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
 | 
						|
				ULPI_OTG_DRVVBUS_EXT);
 | 
						|
 | 
						|
		if (otg_pdata.otg)
 | 
						|
			imx27_add_mxc_ehci_otg(&otg_pdata);
 | 
						|
	} else {
 | 
						|
		gpio_set_value(OTG_PHY_CS_GPIO, 0);
 | 
						|
		imx27_add_fsl_usb2_udc(&otg_device_pdata);
 | 
						|
	}
 | 
						|
 | 
						|
	usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
 | 
						|
				ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
 | 
						|
 | 
						|
	if (usbh2_pdata.otg)
 | 
						|
		imx27_add_mxc_ehci_hs(2, &usbh2_pdata);
 | 
						|
 | 
						|
	imx27_add_imx_fb(&pca100_fb_data);
 | 
						|
 | 
						|
	imx27_add_fec(NULL);
 | 
						|
	imx27_add_imx2_wdt();
 | 
						|
	imx27_add_mxc_w1();
 | 
						|
}
 | 
						|
 | 
						|
static void __init pca100_timer_init(void)
 | 
						|
{
 | 
						|
	mx27_clocks_init(26000000);
 | 
						|
}
 | 
						|
 | 
						|
MACHINE_START(PCA100, "phyCARD-i.MX27")
 | 
						|
	.atag_offset = 0x100,
 | 
						|
	.map_io = mx27_map_io,
 | 
						|
	.init_early = imx27_init_early,
 | 
						|
	.init_irq = mx27_init_irq,
 | 
						|
	.handle_irq = imx27_handle_irq,
 | 
						|
	.init_machine = pca100_init,
 | 
						|
	.init_time	= pca100_timer_init,
 | 
						|
	.restart	= mxc_restart,
 | 
						|
MACHINE_END
 |