b29a51fe0e
This patch, based on Linaro's Cortex Strings library, improves the performance of the assembly optimized memset() function. Signed-off-by: Zhichang Yuan <zhichang.yuan@linaro.org> Signed-off-by: Deepak Saxena <dsaxena@linaro.org> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
216 lines
4.9 KiB
ArmAsm
216 lines
4.9 KiB
ArmAsm
/*
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* Copyright (C) 2013 ARM Ltd.
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* Copyright (C) 2013 Linaro.
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*
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* This code is based on glibc cortex strings work originally authored by Linaro
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* and re-licensed under GPLv2 for the Linux kernel. The original code can
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* be found @
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*
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* http://bazaar.launchpad.net/~linaro-toolchain-dev/cortex-strings/trunk/
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* files/head:/src/aarch64/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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#include <asm/cache.h>
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/*
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* Fill in the buffer with character c (alignment handled by the hardware)
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*
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* Parameters:
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* x0 - buf
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* x1 - c
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* x2 - n
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* Returns:
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* x0 - buf
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*/
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dstin .req x0
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val .req w1
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count .req x2
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tmp1 .req x3
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tmp1w .req w3
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tmp2 .req x4
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tmp2w .req w4
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zva_len_x .req x5
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zva_len .req w5
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zva_bits_x .req x6
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A_l .req x7
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A_lw .req w7
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dst .req x8
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tmp3w .req w9
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tmp3 .req x9
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ENTRY(memset)
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mov dst, dstin /* Preserve return value. */
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and A_lw, val, #255
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orr A_lw, A_lw, A_lw, lsl #8
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orr A_lw, A_lw, A_lw, lsl #16
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orr A_l, A_l, A_l, lsl #32
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cmp count, #15
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b.hi .Lover16_proc
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/*All store maybe are non-aligned..*/
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tbz count, #3, 1f
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str A_l, [dst], #8
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1:
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tbz count, #2, 2f
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str A_lw, [dst], #4
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2:
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tbz count, #1, 3f
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strh A_lw, [dst], #2
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3:
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tbz count, #0, 4f
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strb A_lw, [dst]
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4:
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ret
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.Lover16_proc:
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/*Whether the start address is aligned with 16.*/
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neg tmp2, dst
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ands tmp2, tmp2, #15
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b.eq .Laligned
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/*
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* The count is not less than 16, we can use stp to store the start 16 bytes,
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* then adjust the dst aligned with 16.This process will make the current
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* memory address at alignment boundary.
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*/
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stp A_l, A_l, [dst] /*non-aligned store..*/
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/*make the dst aligned..*/
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sub count, count, tmp2
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add dst, dst, tmp2
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.Laligned:
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cbz A_l, .Lzero_mem
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.Ltail_maybe_long:
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cmp count, #64
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b.ge .Lnot_short
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.Ltail63:
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ands tmp1, count, #0x30
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b.eq 3f
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cmp tmp1w, #0x20
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b.eq 1f
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b.lt 2f
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stp A_l, A_l, [dst], #16
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1:
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stp A_l, A_l, [dst], #16
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2:
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stp A_l, A_l, [dst], #16
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/*
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* The last store length is less than 16,use stp to write last 16 bytes.
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* It will lead some bytes written twice and the access is non-aligned.
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*/
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3:
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ands count, count, #15
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cbz count, 4f
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add dst, dst, count
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stp A_l, A_l, [dst, #-16] /* Repeat some/all of last store. */
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4:
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ret
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/*
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* Critical loop. Start at a new cache line boundary. Assuming
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* 64 bytes per line, this ensures the entire loop is in one line.
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*/
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.p2align L1_CACHE_SHIFT
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.Lnot_short:
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sub dst, dst, #16/* Pre-bias. */
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sub count, count, #64
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1:
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stp A_l, A_l, [dst, #16]
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stp A_l, A_l, [dst, #32]
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stp A_l, A_l, [dst, #48]
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stp A_l, A_l, [dst, #64]!
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subs count, count, #64
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b.ge 1b
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tst count, #0x3f
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add dst, dst, #16
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b.ne .Ltail63
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.Lexitfunc:
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ret
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/*
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* For zeroing memory, check to see if we can use the ZVA feature to
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* zero entire 'cache' lines.
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*/
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.Lzero_mem:
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cmp count, #63
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b.le .Ltail63
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/*
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* For zeroing small amounts of memory, it's not worth setting up
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* the line-clear code.
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*/
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cmp count, #128
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b.lt .Lnot_short /*count is at least 128 bytes*/
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mrs tmp1, dczid_el0
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tbnz tmp1, #4, .Lnot_short
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mov tmp3w, #4
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and zva_len, tmp1w, #15 /* Safety: other bits reserved. */
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lsl zva_len, tmp3w, zva_len
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ands tmp3w, zva_len, #63
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/*
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* ensure the zva_len is not less than 64.
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* It is not meaningful to use ZVA if the block size is less than 64.
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*/
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b.ne .Lnot_short
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.Lzero_by_line:
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/*
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* Compute how far we need to go to become suitably aligned. We're
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* already at quad-word alignment.
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*/
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cmp count, zva_len_x
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b.lt .Lnot_short /* Not enough to reach alignment. */
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sub zva_bits_x, zva_len_x, #1
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neg tmp2, dst
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ands tmp2, tmp2, zva_bits_x
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b.eq 2f /* Already aligned. */
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/* Not aligned, check that there's enough to copy after alignment.*/
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sub tmp1, count, tmp2
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/*
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* grantee the remain length to be ZVA is bigger than 64,
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* avoid to make the 2f's process over mem range.*/
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cmp tmp1, #64
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ccmp tmp1, zva_len_x, #8, ge /* NZCV=0b1000 */
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b.lt .Lnot_short
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/*
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* We know that there's at least 64 bytes to zero and that it's safe
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* to overrun by 64 bytes.
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*/
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mov count, tmp1
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1:
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stp A_l, A_l, [dst]
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stp A_l, A_l, [dst, #16]
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stp A_l, A_l, [dst, #32]
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subs tmp2, tmp2, #64
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stp A_l, A_l, [dst, #48]
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add dst, dst, #64
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b.ge 1b
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/* We've overrun a bit, so adjust dst downwards.*/
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add dst, dst, tmp2
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2:
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sub count, count, zva_len_x
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3:
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dc zva, dst
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add dst, dst, zva_len_x
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subs count, count, zva_len_x
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b.ge 3b
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ands count, count, zva_bits_x
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b.ne .Ltail_maybe_long
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ret
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ENDPROC(memset)
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