 3a9cf8efd7
			
		
	
	
	3a9cf8efd7
	
	
	
		
			
			This patch add support for synopsys I2S controller as per the ASoC framework. Signed-off-by: Rajeev Kumar <rajeev-dlh.kumar@st.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
		
			
				
	
	
		
			69 lines
		
	
	
	
		
			2 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			69 lines
		
	
	
	
		
			2 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Copyright (ST) 2012 Rajeev Kumar (rajeev-dlh.kumar@st.com)
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|  *
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|  * This program is free software; you can redistribute it and/or modify
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|  * it under the terms of the GNU General Public License as published by
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|  * the Free Software Foundation; either version 2 of the License, or
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|  * (at your option) any later version.
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|  *
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|  * This program is distributed in the hope that it will be useful,
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|  * but WITHOUT ANY WARRANTY; without even the implied warranty of
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|  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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|  * GNU General Public License for more details.
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|  *
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|  * You should have received a copy of the GNU General Public License
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|  * along with this program; if not, write to the Free Software
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|  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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|  *
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|  */
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| 
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| #ifndef __SOUND_DESIGNWARE_I2S_H
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| #define __SOUND_DESIGNWARE_I2S_H
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| 
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| #include <linux/dmaengine.h>
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| #include <linux/types.h>
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| 
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| /*
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|  * struct i2s_clk_config_data - represent i2s clk configuration data
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|  * @chan_nr: number of channel
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|  * @data_width: number of bits per sample (8/16/24/32 bit)
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|  * @sample_rate: sampling frequency (8Khz, 16Khz, 32Khz, 44Khz, 48Khz)
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|  */
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| struct i2s_clk_config_data {
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| 	int chan_nr;
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| 	u32 data_width;
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| 	u32 sample_rate;
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| };
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| 
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| struct i2s_platform_data {
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| 	#define DWC_I2S_PLAY	(1 << 0)
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| 	#define DWC_I2S_RECORD	(1 << 1)
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| 	unsigned int cap;
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| 	int channel;
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| 	u32 snd_fmts;
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| 	u32 snd_rates;
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| 
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| 	void *play_dma_data;
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| 	void *capture_dma_data;
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| 	bool (*filter)(struct dma_chan *chan, void *slave);
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| 	int (*i2s_clk_cfg)(struct i2s_clk_config_data *config);
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| };
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| 
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| struct i2s_dma_data {
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| 	void *data;
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| 	dma_addr_t addr;
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| 	u32 max_burst;
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| 	enum dma_slave_buswidth addr_width;
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| 	bool (*filter)(struct dma_chan *chan, void *slave);
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| };
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| 
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| /* I2S DMA registers */
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| #define I2S_RXDMA		0x01C0
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| #define I2S_TXDMA		0x01C8
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| 
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| #define TWO_CHANNEL_SUPPORT	2	/* up to 2.0 */
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| #define FOUR_CHANNEL_SUPPORT	4	/* up to 3.1 */
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| #define SIX_CHANNEL_SUPPORT	6	/* up to 5.1 */
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| #define EIGHT_CHANNEL_SUPPORT	8	/* up to 7.1 */
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| 
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| #endif /*  __SOUND_DESIGNWARE_I2S_H */
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