 e6f66a9f96
			
		
	
	
	e6f66a9f96
	
	
	
		
			
			This patch adds sdhci platform helpers required by sdhci-s3c driver. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
		
			
				
	
	
		
			63 lines
		
	
	
	
		
			1.7 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			63 lines
		
	
	
	
		
			1.7 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
| /* linux/arch/arm/mach-s5pv210/setup-sdhci.c
 | |
|  *
 | |
|  * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
 | |
|  *		http://www.samsung.com/
 | |
|  *
 | |
|  * S5PV210 - Helper functions for settign up SDHCI device(s) (HSMMC)
 | |
|  *
 | |
|  * This program is free software; you can redistribute it and/or modify
 | |
|  * it under the terms of the GNU General Public License version 2 as
 | |
|  * published by the Free Software Foundation.
 | |
| */
 | |
| 
 | |
| #include <linux/kernel.h>
 | |
| #include <linux/types.h>
 | |
| #include <linux/interrupt.h>
 | |
| #include <linux/platform_device.h>
 | |
| #include <linux/io.h>
 | |
| 
 | |
| #include <linux/mmc/card.h>
 | |
| #include <linux/mmc/host.h>
 | |
| 
 | |
| #include <plat/regs-sdhci.h>
 | |
| #include <plat/sdhci.h>
 | |
| 
 | |
| /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
 | |
| 
 | |
| char *s5pv210_hsmmc_clksrcs[4] = {
 | |
| 	[0] = "hsmmc",		/* HCLK */
 | |
| 	[1] = "hsmmc",		/* HCLK */
 | |
| 	[2] = "sclk_mmc",	/* mmc_bus */
 | |
| 	/*[4] = reserved */
 | |
| };
 | |
| 
 | |
| void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev,
 | |
| 				    void __iomem *r,
 | |
| 				    struct mmc_ios *ios,
 | |
| 				    struct mmc_card *card)
 | |
| {
 | |
| 	u32 ctrl2, ctrl3;
 | |
| 
 | |
| 	/* don't need to alter anything acording to card-type */
 | |
| 
 | |
| 	writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, r + S3C64XX_SDHCI_CONTROL4);
 | |
| 
 | |
| 	ctrl2 = readl(r + S3C_SDHCI_CONTROL2);
 | |
| 	ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK;
 | |
| 	ctrl2 |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR |
 | |
| 		  S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK |
 | |
| 		  S3C_SDHCI_CTRL2_ENFBCLKRX |
 | |
| 		  S3C_SDHCI_CTRL2_DFCNT_NONE |
 | |
| 		  S3C_SDHCI_CTRL2_ENCLKOUTHOLD);
 | |
| 
 | |
| 	if (ios->clock < 25 * 1000000)
 | |
| 		ctrl3 = (S3C_SDHCI_CTRL3_FCSEL3 |
 | |
| 			 S3C_SDHCI_CTRL3_FCSEL2 |
 | |
| 			 S3C_SDHCI_CTRL3_FCSEL1 |
 | |
| 			 S3C_SDHCI_CTRL3_FCSEL0);
 | |
| 	else
 | |
| 		ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0);
 | |
| 
 | |
| 	writel(ctrl2, r + S3C_SDHCI_CONTROL2);
 | |
| 	writel(ctrl3, r + S3C_SDHCI_CONTROL3);
 | |
| }
 |