334fef05fd
Signed-off-by: Eric Bénard <eric@eukrea.com> Cc: Sascha Hauer <kernel@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
132 lines
3.3 KiB
C
132 lines
3.3 KiB
C
/*
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* arch/arm/plat-mxc/include/mach/uncompress.h
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*
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* Copyright (C) 1999 ARM Limited
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* Copyright (C) Shane Nay (shane@minirl.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __ASM_ARCH_MXC_UNCOMPRESS_H__
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#define __ASM_ARCH_MXC_UNCOMPRESS_H__
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#define __MXC_BOOT_UNCOMPRESS
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#include <asm/mach-types.h>
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unsigned long uart_base;
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#define UART(x) (*(volatile unsigned long *)(uart_base + (x)))
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#define USR2 0x98
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#define USR2_TXFE (1<<14)
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#define TXR 0x40
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#define UCR1 0x80
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#define UCR1_UARTEN 1
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/*
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* The following code assumes the serial port has already been
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* initialized by the bootloader. We search for the first enabled
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* port in the most probable order. If you didn't setup a port in
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* your bootloader then nothing will appear (which might be desired).
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*
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* This does not append a newline
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*/
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static void putc(int ch)
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{
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if (!uart_base)
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return;
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if (!(UART(UCR1) & UCR1_UARTEN))
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return;
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while (!(UART(USR2) & USR2_TXFE))
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barrier();
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UART(TXR) = ch;
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}
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static inline void flush(void)
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{
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}
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#define MX1_UART1_BASE_ADDR 0x00206000
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#define MX25_UART1_BASE_ADDR 0x43f90000
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#define MX2X_UART1_BASE_ADDR 0x1000a000
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#define MX3X_UART1_BASE_ADDR 0x43F90000
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#define MX3X_UART2_BASE_ADDR 0x43F94000
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#define MX3X_UART5_BASE_ADDR 0x43FB4000
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#define MX51_UART1_BASE_ADDR 0x73fbc000
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#define MX50_UART1_BASE_ADDR 0x53fbc000
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#define MX53_UART1_BASE_ADDR 0x53fbc000
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static __inline__ void __arch_decomp_setup(unsigned long arch_id)
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{
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switch (arch_id) {
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case MACH_TYPE_MX1ADS:
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case MACH_TYPE_SCB9328:
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uart_base = MX1_UART1_BASE_ADDR;
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break;
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case MACH_TYPE_MX25_3DS:
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uart_base = MX25_UART1_BASE_ADDR;
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break;
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case MACH_TYPE_IMX27LITE:
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case MACH_TYPE_MX27_3DS:
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case MACH_TYPE_MX27ADS:
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case MACH_TYPE_PCM038:
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case MACH_TYPE_MX21ADS:
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case MACH_TYPE_PCA100:
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case MACH_TYPE_MXT_TD60:
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case MACH_TYPE_IMX27IPCAM:
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uart_base = MX2X_UART1_BASE_ADDR;
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break;
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case MACH_TYPE_MX31LITE:
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case MACH_TYPE_ARMADILLO5X0:
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case MACH_TYPE_MX31MOBOARD:
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case MACH_TYPE_QONG:
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case MACH_TYPE_MX31_3DS:
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case MACH_TYPE_PCM037:
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case MACH_TYPE_MX31ADS:
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case MACH_TYPE_MX35_3DS:
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case MACH_TYPE_PCM043:
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case MACH_TYPE_LILLY1131:
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case MACH_TYPE_VPR200:
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case MACH_TYPE_EUKREA_CPUIMX35SD:
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uart_base = MX3X_UART1_BASE_ADDR;
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break;
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case MACH_TYPE_MAGX_ZN5:
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uart_base = MX3X_UART2_BASE_ADDR;
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break;
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case MACH_TYPE_BUG:
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uart_base = MX3X_UART5_BASE_ADDR;
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break;
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case MACH_TYPE_MX51_BABBAGE:
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case MACH_TYPE_EUKREA_CPUIMX51SD:
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case MACH_TYPE_MX51_3DS:
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uart_base = MX51_UART1_BASE_ADDR;
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break;
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case MACH_TYPE_MX50_RDP:
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uart_base = MX50_UART1_BASE_ADDR;
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break;
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case MACH_TYPE_MX53_EVK:
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case MACH_TYPE_MX53_LOCO:
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case MACH_TYPE_MX53_SMD:
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case MACH_TYPE_MX53_ARD:
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uart_base = MX53_UART1_BASE_ADDR;
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break;
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default:
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break;
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}
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}
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#define arch_decomp_setup() __arch_decomp_setup(arch_id)
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#define arch_decomp_wdog()
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#endif /* __ASM_ARCH_MXC_UNCOMPRESS_H__ */
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