 7509acdfd1
			
		
	
	
	7509acdfd1
	
	
	
		
			
			SHARP_LOCOMO doesn't exist in Kconfig, therefore replacing all references for it with SHARP_LOCOMO in the source code. Signed-off-by: Christoph Egger <siccegge@cs.fau.de> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
		
			
				
	
	
		
			92 lines
		
	
	
	
		
			2.9 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			92 lines
		
	
	
	
		
			2.9 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * arch/arm/mach-sa1100/include/mach/irqs.h
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|  *
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|  * Copyright (C) 1996 Russell King
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|  * Copyright (C) 1998 Deborah Wallach (updates for SA1100/Brutus).
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|  * Copyright (C) 1999 Nicolas Pitre (full GPIO irq isolation)
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|  *
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|  * 2001/11/14	RMK	Cleaned up and standardised a lot of the IRQs.
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|  */
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| 
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| #define	IRQ_GPIO0		0
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| #define	IRQ_GPIO1		1
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| #define	IRQ_GPIO2		2
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| #define	IRQ_GPIO3		3
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| #define	IRQ_GPIO4		4
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| #define	IRQ_GPIO5		5
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| #define	IRQ_GPIO6		6
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| #define	IRQ_GPIO7		7
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| #define	IRQ_GPIO8		8
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| #define	IRQ_GPIO9		9
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| #define	IRQ_GPIO10		10
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| #define	IRQ_GPIO11_27		11
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| #define	IRQ_LCD  		12	/* LCD controller           */
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| #define	IRQ_Ser0UDC		13	/* Ser. port 0 UDC          */
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| #define	IRQ_Ser1SDLC		14	/* Ser. port 1 SDLC         */
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| #define	IRQ_Ser1UART		15	/* Ser. port 1 UART         */
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| #define	IRQ_Ser2ICP		16	/* Ser. port 2 ICP          */
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| #define	IRQ_Ser3UART		17	/* Ser. port 3 UART         */
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| #define	IRQ_Ser4MCP		18	/* Ser. port 4 MCP          */
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| #define	IRQ_Ser4SSP		19	/* Ser. port 4 SSP          */
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| #define	IRQ_DMA0 		20	/* DMA controller channel 0 */
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| #define	IRQ_DMA1 		21	/* DMA controller channel 1 */
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| #define	IRQ_DMA2 		22	/* DMA controller channel 2 */
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| #define	IRQ_DMA3 		23	/* DMA controller channel 3 */
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| #define	IRQ_DMA4 		24	/* DMA controller channel 4 */
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| #define	IRQ_DMA5 		25	/* DMA controller channel 5 */
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| #define	IRQ_OST0 		26	/* OS Timer match 0         */
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| #define	IRQ_OST1 		27	/* OS Timer match 1         */
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| #define	IRQ_OST2 		28	/* OS Timer match 2         */
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| #define	IRQ_OST3 		29	/* OS Timer match 3         */
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| #define	IRQ_RTC1Hz		30	/* RTC 1 Hz clock           */
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| #define	IRQ_RTCAlrm		31	/* RTC Alarm                */
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| 
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| #define	IRQ_GPIO11		32
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| #define	IRQ_GPIO12		33
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| #define	IRQ_GPIO13		34
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| #define	IRQ_GPIO14		35
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| #define	IRQ_GPIO15		36
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| #define	IRQ_GPIO16		37
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| #define	IRQ_GPIO17		38
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| #define	IRQ_GPIO18		39
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| #define	IRQ_GPIO19		40
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| #define	IRQ_GPIO20		41
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| #define	IRQ_GPIO21		42
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| #define	IRQ_GPIO22		43
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| #define	IRQ_GPIO23		44
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| #define	IRQ_GPIO24		45
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| #define	IRQ_GPIO25		46
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| #define	IRQ_GPIO26		47
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| #define	IRQ_GPIO27		48
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| 
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| /*
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|  * The next 16 interrupts are for board specific purposes.  Since
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|  * the kernel can only run on one machine at a time, we can re-use
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|  * these.  If you need more, increase IRQ_BOARD_END, but keep it
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|  * within sensible limits.  IRQs 49 to 64 are available.
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|  */
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| #define IRQ_BOARD_START		49
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| #define IRQ_BOARD_END		65
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| 
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| /*
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|  * Figure out the MAX IRQ number.
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|  *
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|  * If we have an SA1111, the max IRQ is S1_BVD1_STSCHG+1.
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|  * If we have an LoCoMo, the max IRQ is IRQ_BOARD_START + 4
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|  * Otherwise, we have the standard IRQs only.
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|  */
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| #ifdef CONFIG_SA1111
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| #define NR_IRQS			(IRQ_BOARD_END + 55)
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| #elif defined(CONFIG_SHARP_LOCOMO)
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| #define NR_IRQS			(IRQ_BOARD_START + 4)
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| #else
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| #define NR_IRQS			(IRQ_BOARD_START)
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| #endif
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| 
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| /*
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|  * Board specific IRQs.  Define them here.
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|  * Do not surround them with ifdefs.
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|  */
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| #define IRQ_NEPONSET_SMC9196	(IRQ_BOARD_START + 0)
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| #define IRQ_NEPONSET_USAR	(IRQ_BOARD_START + 1)
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| #define IRQ_NEPONSET_SA1111	(IRQ_BOARD_START + 2)
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