Disables the legacy clock framework and passes the mode bits to the CPG driver if CCF is enabled. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
		
			
				
	
	
		
			86 lines
		
	
	
	
		
			2 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			86 lines
		
	
	
	
		
			2 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * Bock-W board support
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 *
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 * Copyright (C) 2013  Renesas Solutions Corp.
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 * Copyright (C) 2013  Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
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 *
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 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License as published by
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 * the Free Software Foundation; version 2 of the License.
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 *
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 * This program is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 * GNU General Public License for more details.
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 */
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#include <linux/of_platform.h>
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#include <asm/mach/arch.h>
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#include "common.h"
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#include "r8a7778.h"
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/*
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 *	see board-bock.c for checking detail of dip-switch
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 */
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#define FPGA	0x18200000
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#define IRQ0MR	0x30
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#define COMCTLR	0x101c
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#define PFC	0xfffc0000
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#define PUPR4	0x110
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static void __init bockw_init(void)
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{
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	void __iomem *fpga;
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	void __iomem *pfc;
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#ifndef CONFIG_COMMON_CLK
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	r8a7778_clock_init();
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#endif
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	r8a7778_init_irq_extpin_dt(1);
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	r8a7778_add_dt_devices();
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	fpga = ioremap_nocache(FPGA, SZ_1M);
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	if (fpga) {
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		/*
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		 * CAUTION
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		 *
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		 * IRQ0/1 is cascaded interrupt from FPGA.
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		 * it should be cared in the future
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		 * Now, it is assuming IRQ0 was used only from SMSC.
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		 */
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		u16 val = ioread16(fpga + IRQ0MR);
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		val &= ~(1 << 4); /* enable SMSC911x */
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		iowrite16(val, fpga + IRQ0MR);
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		iounmap(fpga);
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	}
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	pfc = ioremap_nocache(PFC, 0x200);
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	if (pfc) {
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		/*
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		 * FIXME
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		 *
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		 * SDHI CD/WP pin needs pull-up
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		 */
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		iowrite32(ioread32(pfc + PUPR4) | (3 << 26), pfc + PUPR4);
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		iounmap(pfc);
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	}
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	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
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}
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static const char *bockw_boards_compat_dt[] __initdata = {
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	"renesas,bockw-reference",
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	NULL,
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};
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DT_MACHINE_START(BOCKW_DT, "bockw")
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	.init_early	= shmobile_init_delay,
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	.init_irq	= r8a7778_init_irq_dt,
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	.init_machine	= bockw_init,
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	.init_late	= shmobile_init_late,
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	.dt_compat	= bockw_boards_compat_dt,
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MACHINE_END
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