166 lines
5 KiB
C
166 lines
5 KiB
C
/*
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* The setup file for serial related hardware on PMC-Sierra MSP processors.
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*
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* Copyright 2005 PMC-Sierra, Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/serial.h>
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#include <linux/serial_core.h>
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#include <linux/serial_reg.h>
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#include <asm/bootinfo.h>
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#include <asm/io.h>
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#include <asm/processor.h>
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#include <asm/serial.h>
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#include <linux/serial_8250.h>
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#include <msp_prom.h>
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#include <msp_int.h>
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#include <msp_regs.h>
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#ifdef CONFIG_KGDB
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/*
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* kgdb uses serial port 1 so the console can remain on port 0.
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* To use port 0 change the definition to read as follows:
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* #define DEBUG_PORT_BASE KSEG1ADDR(MSP_UART0_BASE)
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*/
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#define DEBUG_PORT_BASE KSEG1ADDR(MSP_UART1_BASE)
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int putDebugChar(char c)
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{
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volatile uint32_t *uart = (volatile uint32_t *)DEBUG_PORT_BASE;
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uint32_t val = (uint32_t)c;
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local_irq_disable();
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while( !(uart[5] & 0x20) ); /* Wait for TXRDY */
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uart[0] = val;
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while( !(uart[5] & 0x20) ); /* Wait for TXRDY */
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local_irq_enable();
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return 1;
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}
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char getDebugChar(void)
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{
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volatile uint32_t *uart = (volatile uint32_t *)DEBUG_PORT_BASE;
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uint32_t val;
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while( !(uart[5] & 0x01) ); /* Wait for RXRDY */
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val = uart[0];
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return (char)val;
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}
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void initDebugPort(unsigned int uartclk, unsigned int baudrate)
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{
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unsigned int baud_divisor = (uartclk + 8 * baudrate)/(16 * baudrate);
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/* Enable FIFOs */
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writeb(UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR |
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UART_FCR_CLEAR_XMIT | UART_FCR_TRIGGER_4,
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(char *)DEBUG_PORT_BASE + (UART_FCR * 4));
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/* Select brtc divisor */
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writeb(UART_LCR_DLAB, (char *)DEBUG_PORT_BASE + (UART_LCR * 4));
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/* Store divisor lsb */
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writeb(baud_divisor, (char *)DEBUG_PORT_BASE + (UART_TX * 4));
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/* Store divisor msb */
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writeb(baud_divisor >> 8, (char *)DEBUG_PORT_BASE + (UART_IER * 4));
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/* Set 8N1 mode */
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writeb(UART_LCR_WLEN8, (char *)DEBUG_PORT_BASE + (UART_LCR * 4));
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/* Disable flow control */
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writeb(0, (char *)DEBUG_PORT_BASE + (UART_MCR * 4));
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/* Disable receive interrupt(!) */
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writeb(0, (char *)DEBUG_PORT_BASE + (UART_IER * 4));
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}
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#endif
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void __init msp_serial_setup(void)
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{
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char *s;
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char *endp;
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struct uart_port up;
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unsigned int uartclk;
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memset(&up, 0, sizeof(up));
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/* Check if clock was specified in environment */
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s = prom_getenv("uartfreqhz");
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if(!(s && *s && (uartclk = simple_strtoul(s, &endp, 10)) && *endp == 0))
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uartclk = MSP_BASE_BAUD;
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ppfinit("UART clock set to %d\n", uartclk);
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/* Initialize first serial port */
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up.mapbase = MSP_UART0_BASE;
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up.membase = ioremap_nocache(up.mapbase, MSP_UART_REG_LEN);
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up.irq = MSP_INT_UART0;
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up.uartclk = uartclk;
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up.regshift = 2;
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up.iotype = UPIO_DWAPB; /* UPIO_MEM like */
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up.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST;
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up.type = PORT_16550A;
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up.line = 0;
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up.private_data = (void*)UART0_STATUS_REG;
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if (early_serial_setup(&up))
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printk(KERN_ERR "Early serial init of port 0 failed\n");
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/* Initialize the second serial port, if one exists */
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switch (mips_machtype) {
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case MACH_MSP4200_EVAL:
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case MACH_MSP4200_GW:
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case MACH_MSP4200_FPGA:
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case MACH_MSP7120_EVAL:
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case MACH_MSP7120_GW:
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case MACH_MSP7120_FPGA:
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/* Enable UART1 on MSP4200 and MSP7120 */
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*GPIO_CFG2_REG = 0x00002299;
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#ifdef CONFIG_KGDB
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/* Initialize UART1 for kgdb since PMON doesn't */
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if( DEBUG_PORT_BASE == KSEG1ADDR(MSP_UART1_BASE) ) {
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if( mips_machtype == MACH_MSP4200_FPGA
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|| mips_machtype == MACH_MSP7120_FPGA )
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initDebugPort(uartclk, 19200);
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else
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initDebugPort(uartclk, 57600);
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}
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#endif
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break;
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default:
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return; /* No second serial port, good-bye. */
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}
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up.mapbase = MSP_UART1_BASE;
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up.membase = ioremap_nocache(up.mapbase, MSP_UART_REG_LEN);
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up.irq = MSP_INT_UART1;
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up.line = 1;
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up.private_data = (void*)UART1_STATUS_REG;
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if (early_serial_setup(&up))
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printk(KERN_ERR "Early serial init of port 1 failed\n");
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}
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