This patch changes 24xx to use new register access, except for clock framework. Clock framework register access will get updates in the next patch. Note that board-*.c files change GPMC (General Purpose Memory Controller) access to use gpmc_cs_write_reg() instead of accessing the registers directly. The code also uses gpmc_fck instead of it's parent clock core_l3_ck for GPMC clock. The H4 board file also adds h4_init_flash() function, which specify the flash start and end addresses. Also note that sleep.S removes some unused registers addresses. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
		
			
				
	
	
		
			435 lines
		
	
	
	
		
			10 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			435 lines
		
	
	
	
		
			10 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * linux/arch/arm/mach-omap2/board-h4.c
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 *
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 * Copyright (C) 2005 Nokia Corporation
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 * Author: Paul Mundt <paul.mundt@nokia.com>
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 *
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 * Modified from mach-omap/omap1/board-generic.c
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 *
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 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License version 2 as
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 * published by the Free Software Foundation.
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 */
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <linux/delay.h>
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#include <linux/workqueue.h>
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#include <linux/input.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <asm/hardware.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/mach/flash.h>
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#include <asm/arch/control.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/gpioexpander.h>
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#include <asm/arch/mux.h>
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#include <asm/arch/usb.h>
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#include <asm/arch/irda.h>
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#include <asm/arch/board.h>
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#include <asm/arch/common.h>
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#include <asm/arch/keypad.h>
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#include <asm/arch/menelaus.h>
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#include <asm/arch/dma.h>
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#include <asm/arch/gpmc.h>
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#include <asm/io.h>
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#define H4_FLASH_CS	0
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#define H4_SMC91X_CS	1
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static unsigned int row_gpios[6] = { 88, 89, 124, 11, 6, 96 };
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static unsigned int col_gpios[7] = { 90, 91, 100, 36, 12, 97, 98 };
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static int h4_keymap[] = {
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	KEY(0, 0, KEY_LEFT),
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	KEY(0, 1, KEY_RIGHT),
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	KEY(0, 2, KEY_A),
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	KEY(0, 3, KEY_B),
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	KEY(0, 4, KEY_C),
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	KEY(1, 0, KEY_DOWN),
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	KEY(1, 1, KEY_UP),
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	KEY(1, 2, KEY_E),
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	KEY(1, 3, KEY_F),
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	KEY(1, 4, KEY_G),
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	KEY(2, 0, KEY_ENTER),
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	KEY(2, 1, KEY_I),
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	KEY(2, 2, KEY_J),
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	KEY(2, 3, KEY_K),
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	KEY(2, 4, KEY_3),
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	KEY(3, 0, KEY_M),
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	KEY(3, 1, KEY_N),
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	KEY(3, 2, KEY_O),
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	KEY(3, 3, KEY_P),
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	KEY(3, 4, KEY_Q),
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	KEY(4, 0, KEY_R),
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	KEY(4, 1, KEY_4),
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	KEY(4, 2, KEY_T),
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	KEY(4, 3, KEY_U),
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	KEY(4, 4, KEY_ENTER),
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	KEY(5, 0, KEY_V),
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	KEY(5, 1, KEY_W),
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	KEY(5, 2, KEY_L),
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	KEY(5, 3, KEY_S),
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	KEY(5, 4, KEY_ENTER),
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	0
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};
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static struct mtd_partition h4_partitions[] = {
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	/* bootloader (U-Boot, etc) in first sector */
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	{
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	      .name		= "bootloader",
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	      .offset		= 0,
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	      .size		= SZ_128K,
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	      .mask_flags	= MTD_WRITEABLE, /* force read-only */
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	},
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	/* bootloader params in the next sector */
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	{
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	      .name		= "params",
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	      .offset		= MTDPART_OFS_APPEND,
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	      .size		= SZ_128K,
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	      .mask_flags	= 0,
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	},
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	/* kernel */
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	{
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	      .name		= "kernel",
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	      .offset		= MTDPART_OFS_APPEND,
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	      .size		= SZ_2M,
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	      .mask_flags	= 0
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	},
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	/* file system */
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	{
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	      .name		= "filesystem",
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	      .offset		= MTDPART_OFS_APPEND,
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	      .size		= MTDPART_SIZ_FULL,
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	      .mask_flags	= 0
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	}
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};
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static struct flash_platform_data h4_flash_data = {
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	.map_name	= "cfi_probe",
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	.width		= 2,
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	.parts		= h4_partitions,
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	.nr_parts	= ARRAY_SIZE(h4_partitions),
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};
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static struct resource h4_flash_resource = {
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	.flags		= IORESOURCE_MEM,
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};
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static struct platform_device h4_flash_device = {
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	.name		= "omapflash",
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	.id		= 0,
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	.dev		= {
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		.platform_data	= &h4_flash_data,
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	},
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	.num_resources	= 1,
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	.resource	= &h4_flash_resource,
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};
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/* Select between the IrDA and aGPS module
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 */
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static int h4_select_irda(struct device *dev, int state)
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{
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	unsigned char expa;
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	int err = 0;
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	if ((err = read_gpio_expa(&expa, 0x21))) {
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		printk(KERN_ERR "Error reading from I/O expander\n");
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		return err;
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	}
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	/* 'P6' enable/disable IRDA_TX and IRDA_RX */
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	if (state & IR_SEL) {	/* IrDa */
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		if ((err = write_gpio_expa(expa | 0x01, 0x21))) {
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			printk(KERN_ERR "Error writing to I/O expander\n");
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			return err;
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		}
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	} else {
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		if ((err = write_gpio_expa(expa & ~0x01, 0x21))) {
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			printk(KERN_ERR "Error writing to I/O expander\n");
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			return err;
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		}
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	}
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	return err;
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}
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static void set_trans_mode(struct work_struct *work)
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{
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	struct omap_irda_config *irda_config =
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		container_of(work, struct omap_irda_config, gpio_expa.work);
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	int mode = irda_config->mode;
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	unsigned char expa;
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	int err = 0;
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	if ((err = read_gpio_expa(&expa, 0x20)) != 0) {
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		printk(KERN_ERR "Error reading from I/O expander\n");
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	}
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	expa &= ~0x01;
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	if (!(mode & IR_SIRMODE)) { /* MIR/FIR */
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		expa |= 0x01;
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	}
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	if ((err = write_gpio_expa(expa, 0x20)) != 0) {
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		printk(KERN_ERR "Error writing to I/O expander\n");
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	}
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}
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static int h4_transceiver_mode(struct device *dev, int mode)
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{
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	struct omap_irda_config *irda_config = dev->platform_data;
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	irda_config->mode = mode;
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	cancel_delayed_work(&irda_config->gpio_expa);
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	PREPARE_DELAYED_WORK(&irda_config->gpio_expa, set_trans_mode);
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	schedule_delayed_work(&irda_config->gpio_expa, 0);
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	return 0;
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}
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static struct omap_irda_config h4_irda_data = {
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	.transceiver_cap	= IR_SIRMODE | IR_MIRMODE | IR_FIRMODE,
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	.transceiver_mode	= h4_transceiver_mode,
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	.select_irda	 	= h4_select_irda,
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	.rx_channel		= OMAP24XX_DMA_UART3_RX,
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	.tx_channel		= OMAP24XX_DMA_UART3_TX,
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	.dest_start		= OMAP_UART3_BASE,
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	.src_start		= OMAP_UART3_BASE,
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	.tx_trigger		= OMAP24XX_DMA_UART3_TX,
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	.rx_trigger		= OMAP24XX_DMA_UART3_RX,
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};
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static struct resource h4_irda_resources[] = {
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	[0] = {
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		.start	= INT_24XX_UART3_IRQ,
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		.end	= INT_24XX_UART3_IRQ,
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		.flags	= IORESOURCE_IRQ,
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	},
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};
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static struct platform_device h4_irda_device = {
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	.name		= "omapirda",
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	.id		= -1,
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	.dev		= {
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		.platform_data	= &h4_irda_data,
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	},
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	.num_resources	= 1,
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	.resource	= h4_irda_resources,
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};
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static struct omap_kp_platform_data h4_kp_data = {
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	.rows		= 6,
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	.cols		= 7,
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	.keymap 	= h4_keymap,
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	.keymapsize 	= ARRAY_SIZE(h4_keymap),
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	.rep		= 1,
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	.row_gpios 	= row_gpios,
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	.col_gpios 	= col_gpios,
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};
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static struct platform_device h4_kp_device = {
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	.name		= "omap-keypad",
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	.id		= -1,
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	.dev		= {
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		.platform_data = &h4_kp_data,
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	},
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};
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static struct platform_device h4_lcd_device = {
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	.name		= "lcd_h4",
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	.id		= -1,
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};
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static struct platform_device *h4_devices[] __initdata = {
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	&h4_flash_device,
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	&h4_irda_device,
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	&h4_kp_device,
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	&h4_lcd_device,
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};
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/* 2420 Sysboot setup (2430 is different) */
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static u32 get_sysboot_value(void)
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{
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	return (omap_ctrl_readl(OMAP24XX_CONTROL_STATUS) &
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		(OMAP2_SYSBOOT_5_MASK | OMAP2_SYSBOOT_4_MASK |
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		 OMAP2_SYSBOOT_3_MASK | OMAP2_SYSBOOT_2_MASK |
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		 OMAP2_SYSBOOT_1_MASK | OMAP2_SYSBOOT_0_MASK));
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}
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/* H4-2420's always used muxed mode, H4-2422's always use non-muxed
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 *
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 * Note: OMAP-GIT doesn't correctly do is_cpu_omap2422 and is_cpu_omap2423
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 *  correctly.  The macro needs to look at production_id not just hawkeye.
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 */
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static u32 is_gpmc_muxed(void)
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{
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	u32 mux;
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	mux = get_sysboot_value();
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	if ((mux & 0xF) == 0xd)
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		return 1;	/* NAND config (could be either) */
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	if (mux & 0x2)		/* if mux'ed */
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		return 1;
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	else
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		return 0;
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}
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static inline void __init h4_init_debug(void)
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{
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	int eth_cs;
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	unsigned long cs_mem_base;
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	unsigned int muxed, rate;
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	struct clk *gpmc_fck;
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	eth_cs	= H4_SMC91X_CS;
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	gpmc_fck = clk_get(NULL, "gpmc_fck");	/* Always on ENABLE_ON_INIT */
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	if (IS_ERR(gpmc_fck)) {
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		WARN_ON(1);
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		return;
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	}
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	clk_enable(gpmc_fck);
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	rate = clk_get_rate(gpmc_fck);
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	clk_disable(gpmc_fck);
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	clk_put(gpmc_fck);
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	if (is_gpmc_muxed())
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		muxed = 0x200;
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	else
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		muxed = 0;
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	/* Make sure CS1 timings are correct */
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	gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG1,
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			  0x00011000 | muxed);
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	if (rate >= 160000000) {
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		gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f01);
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		gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080803);
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		gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1c0b1c0a);
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		gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x041f1F1F);
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		gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x000004C4);
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	} else if (rate >= 130000000) {
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		gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f00);
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		gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080802);
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		gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1C091C09);
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		gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x041f1F1F);
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		gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x000004C4);
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	} else {/* rate = 100000000 */
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		gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f00);
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		gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080802);
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		gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1C091C09);
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		gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x031A1F1F);
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		gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x000003C2);
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	}
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	if (gpmc_cs_request(eth_cs, SZ_16M, &cs_mem_base) < 0) {
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		printk(KERN_ERR "Failed to request GPMC mem for smc91x\n");
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		goto out;
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	}
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	udelay(100);
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	omap_cfg_reg(M15_24XX_GPIO92);
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	if (debug_card_init(cs_mem_base, OMAP24XX_ETHR_GPIO_IRQ) < 0)
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		gpmc_cs_free(eth_cs);
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out:
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	clk_disable(gpmc_fck);
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	clk_put(gpmc_fck);
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}
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 | 
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static void __init h4_init_flash(void)
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						|
{
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	unsigned long base;
 | 
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 | 
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	if (gpmc_cs_request(H4_FLASH_CS, SZ_64M, &base) < 0) {
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		printk("Can't request GPMC CS for flash\n");
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		return;
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	}
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	h4_flash_resource.start	= base;
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	h4_flash_resource.end	= base + SZ_64M - 1;
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}
 | 
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 | 
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static void __init omap_h4_init_irq(void)
 | 
						|
{
 | 
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	omap2_init_common_hw();
 | 
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	omap_init_irq();
 | 
						|
	omap_gpio_init();
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						|
	h4_init_flash();
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}
 | 
						|
 | 
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static struct omap_uart_config h4_uart_config __initdata = {
 | 
						|
	.enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
 | 
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};
 | 
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 | 
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static struct omap_mmc_config h4_mmc_config __initdata = {
 | 
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	.mmc [0] = {
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		.enabled	= 1,
 | 
						|
		.wire4		= 1,
 | 
						|
		.wp_pin		= -1,
 | 
						|
		.power_pin	= -1,
 | 
						|
		.switch_pin	= -1,
 | 
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	},
 | 
						|
};
 | 
						|
 | 
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static struct omap_lcd_config h4_lcd_config __initdata = {
 | 
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	.ctrl_name	= "internal",
 | 
						|
};
 | 
						|
 | 
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static struct omap_board_config_kernel h4_config[] = {
 | 
						|
	{ OMAP_TAG_UART,	&h4_uart_config },
 | 
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	{ OMAP_TAG_MMC,		&h4_mmc_config },
 | 
						|
	{ OMAP_TAG_LCD,		&h4_lcd_config },
 | 
						|
};
 | 
						|
 | 
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static void __init omap_h4_init(void)
 | 
						|
{
 | 
						|
	/*
 | 
						|
	 * Make sure the serial ports are muxed on at this point.
 | 
						|
	 * You have to mux them off in device drivers later on
 | 
						|
	 * if not needed.
 | 
						|
	 */
 | 
						|
#if defined(CONFIG_OMAP_IR) || defined(CONFIG_OMAP_IR_MODULE)
 | 
						|
	omap_cfg_reg(K15_24XX_UART3_TX);
 | 
						|
	omap_cfg_reg(K14_24XX_UART3_RX);
 | 
						|
#endif
 | 
						|
 | 
						|
#if defined(CONFIG_KEYBOARD_OMAP) || defined(CONFIG_KEYBOARD_OMAP_MODULE)
 | 
						|
	if (omap_has_menelaus()) {
 | 
						|
		row_gpios[5] = 0;
 | 
						|
		col_gpios[2] = 15;
 | 
						|
		col_gpios[6] = 18;
 | 
						|
	}
 | 
						|
#endif
 | 
						|
 | 
						|
	platform_add_devices(h4_devices, ARRAY_SIZE(h4_devices));
 | 
						|
	omap_board_config = h4_config;
 | 
						|
	omap_board_config_size = ARRAY_SIZE(h4_config);
 | 
						|
	omap_serial_init();
 | 
						|
}
 | 
						|
 | 
						|
static void __init omap_h4_map_io(void)
 | 
						|
{
 | 
						|
	omap2_map_common_io();
 | 
						|
}
 | 
						|
 | 
						|
MACHINE_START(OMAP_H4, "OMAP2420 H4 board")
 | 
						|
	/* Maintainer: Paul Mundt <paul.mundt@nokia.com> */
 | 
						|
	.phys_io	= 0x48000000,
 | 
						|
	.io_pg_offst	= ((0xd8000000) >> 18) & 0xfffc,
 | 
						|
	.boot_params	= 0x80000100,
 | 
						|
	.map_io		= omap_h4_map_io,
 | 
						|
	.init_irq	= omap_h4_init_irq,
 | 
						|
	.init_machine	= omap_h4_init,
 | 
						|
	.timer		= &omap_timer,
 | 
						|
MACHINE_END
 |