a7eb7c6f9a
This is cleaner than exporting the mcpm_smp_ops structure. Signed-off-by: Nicolas Pitre <nico@linaro.org> Acked-by: Jon Medhurst <tixy@linaro.org>
209 lines
6.3 KiB
C
209 lines
6.3 KiB
C
/*
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* arch/arm/include/asm/mcpm.h
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*
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* Created by: Nicolas Pitre, April 2012
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* Copyright: (C) 2012-2013 Linaro Limited
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef MCPM_H
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#define MCPM_H
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/*
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* Maximum number of possible clusters / CPUs per cluster.
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*
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* This should be sufficient for quite a while, while keeping the
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* (assembly) code simpler. When this starts to grow then we'll have
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* to consider dynamic allocation.
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*/
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#define MAX_CPUS_PER_CLUSTER 4
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#define MAX_NR_CLUSTERS 2
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#ifndef __ASSEMBLY__
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#include <linux/types.h>
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#include <asm/cacheflush.h>
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/*
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* Platform specific code should use this symbol to set up secondary
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* entry location for processors to use when released from reset.
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*/
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extern void mcpm_entry_point(void);
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/*
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* This is used to indicate where the given CPU from given cluster should
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* branch once it is ready to re-enter the kernel using ptr, or NULL if it
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* should be gated. A gated CPU is held in a WFE loop until its vector
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* becomes non NULL.
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*/
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void mcpm_set_entry_vector(unsigned cpu, unsigned cluster, void *ptr);
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/*
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* CPU/cluster power operations API for higher subsystems to use.
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*/
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/**
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* mcpm_cpu_power_up - make given CPU in given cluster runable
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*
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* @cpu: CPU number within given cluster
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* @cluster: cluster number for the CPU
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*
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* The identified CPU is brought out of reset. If the cluster was powered
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* down then it is brought up as well, taking care not to let the other CPUs
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* in the cluster run, and ensuring appropriate cluster setup.
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*
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* Caller must ensure the appropriate entry vector is initialized with
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* mcpm_set_entry_vector() prior to calling this.
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*
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* This must be called in a sleepable context. However, the implementation
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* is strongly encouraged to return early and let the operation happen
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* asynchronously, especially when significant delays are expected.
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*
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* If the operation cannot be performed then an error code is returned.
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*/
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int mcpm_cpu_power_up(unsigned int cpu, unsigned int cluster);
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/**
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* mcpm_cpu_power_down - power the calling CPU down
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*
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* The calling CPU is powered down.
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*
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* If this CPU is found to be the "last man standing" in the cluster
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* then the cluster is prepared for power-down too.
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*
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* This must be called with interrupts disabled.
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*
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* This does not return. Re-entry in the kernel is expected via
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* mcpm_entry_point.
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*/
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void mcpm_cpu_power_down(void);
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/**
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* mcpm_cpu_suspend - bring the calling CPU in a suspended state
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*
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* @expected_residency: duration in microseconds the CPU is expected
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* to remain suspended, or 0 if unknown/infinity.
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*
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* The calling CPU is suspended. The expected residency argument is used
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* as a hint by the platform specific backend to implement the appropriate
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* sleep state level according to the knowledge it has on wake-up latency
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* for the given hardware.
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*
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* If this CPU is found to be the "last man standing" in the cluster
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* then the cluster may be prepared for power-down too, if the expected
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* residency makes it worthwhile.
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*
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* This must be called with interrupts disabled.
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*
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* This does not return. Re-entry in the kernel is expected via
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* mcpm_entry_point.
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*/
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void mcpm_cpu_suspend(u64 expected_residency);
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/**
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* mcpm_cpu_powered_up - housekeeping workafter a CPU has been powered up
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*
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* This lets the platform specific backend code perform needed housekeeping
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* work. This must be called by the newly activated CPU as soon as it is
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* fully operational in kernel space, before it enables interrupts.
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*
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* If the operation cannot be performed then an error code is returned.
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*/
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int mcpm_cpu_powered_up(void);
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/*
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* Platform specific methods used in the implementation of the above API.
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*/
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struct mcpm_platform_ops {
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int (*power_up)(unsigned int cpu, unsigned int cluster);
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void (*power_down)(void);
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void (*suspend)(u64);
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void (*powered_up)(void);
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};
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/**
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* mcpm_platform_register - register platform specific power methods
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*
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* @ops: mcpm_platform_ops structure to register
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*
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* An error is returned if the registration has been done previously.
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*/
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int __init mcpm_platform_register(const struct mcpm_platform_ops *ops);
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/* Synchronisation structures for coordinating safe cluster setup/teardown: */
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/*
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* When modifying this structure, make sure you update the MCPM_SYNC_ defines
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* to match.
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*/
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struct mcpm_sync_struct {
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/* individual CPU states */
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struct {
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s8 cpu __aligned(__CACHE_WRITEBACK_GRANULE);
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} cpus[MAX_CPUS_PER_CLUSTER];
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/* cluster state */
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s8 cluster __aligned(__CACHE_WRITEBACK_GRANULE);
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/* inbound-side state */
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s8 inbound __aligned(__CACHE_WRITEBACK_GRANULE);
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};
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struct sync_struct {
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struct mcpm_sync_struct clusters[MAX_NR_CLUSTERS];
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};
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extern unsigned long sync_phys; /* physical address of *mcpm_sync */
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void __mcpm_cpu_going_down(unsigned int cpu, unsigned int cluster);
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void __mcpm_cpu_down(unsigned int cpu, unsigned int cluster);
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void __mcpm_outbound_leave_critical(unsigned int cluster, int state);
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bool __mcpm_outbound_enter_critical(unsigned int this_cpu, unsigned int cluster);
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int __mcpm_cluster_state(unsigned int cluster);
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int __init mcpm_sync_init(
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void (*power_up_setup)(unsigned int affinity_level));
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void __init mcpm_smp_set_ops(void);
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#else
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/*
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* asm-offsets.h causes trouble when included in .c files, and cacheflush.h
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* cannot be included in asm files. Let's work around the conflict like this.
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*/
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#include <asm/asm-offsets.h>
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#define __CACHE_WRITEBACK_GRANULE CACHE_WRITEBACK_GRANULE
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#endif /* ! __ASSEMBLY__ */
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/* Definitions for mcpm_sync_struct */
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#define CPU_DOWN 0x11
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#define CPU_COMING_UP 0x12
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#define CPU_UP 0x13
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#define CPU_GOING_DOWN 0x14
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#define CLUSTER_DOWN 0x21
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#define CLUSTER_UP 0x22
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#define CLUSTER_GOING_DOWN 0x23
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#define INBOUND_NOT_COMING_UP 0x31
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#define INBOUND_COMING_UP 0x32
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/*
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* Offsets for the mcpm_sync_struct members, for use in asm.
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* We don't want to make them global to the kernel via asm-offsets.c.
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*/
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#define MCPM_SYNC_CLUSTER_CPUS 0
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#define MCPM_SYNC_CPU_SIZE __CACHE_WRITEBACK_GRANULE
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#define MCPM_SYNC_CLUSTER_CLUSTER \
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(MCPM_SYNC_CLUSTER_CPUS + MCPM_SYNC_CPU_SIZE * MAX_CPUS_PER_CLUSTER)
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#define MCPM_SYNC_CLUSTER_INBOUND \
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(MCPM_SYNC_CLUSTER_CLUSTER + __CACHE_WRITEBACK_GRANULE)
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#define MCPM_SYNC_CLUSTER_SIZE \
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(MCPM_SYNC_CLUSTER_INBOUND + __CACHE_WRITEBACK_GRANULE)
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#endif
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